diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/Documentation/Configure.help /usr/src/sh/7751/cvs/linux/Documentation/Configure.help
--- /usr/src/sh/7751/cvs/linux-2.4.18/Documentation/Configure.help Mon Feb 25 21:37:51 2002
+++ /usr/src/sh/7751/cvs/linux/Documentation/Configure.help Fri May 10 20:58:51 2002
@@ -10246,6 +10246,12 @@
instead of an internal one. Disabling this option will save some
memory by making the code size smaller. If unsure, say Y.
+Support for Dreamcast Broad Band Adaptor
+CONFIG_8139TOO_DREAMCAST
+ This enables support for the SEGA Broad Band Adaptor for Dreamcast.
+ It uses 16KB buffer and doesn't support mapping main memory to DMA.
+ If unsure, say N.
+
SiS 900/7016 PCI Fast Ethernet Adapter support
CONFIG_SIS900
This is a driver for the Fast Ethernet PCI network cards based on
@@ -24216,6 +24222,17 @@
. There is a
Dreamcast project is at .
+# Remove overdrive
+# Add SH7751 STB1_Harp, CAT68701, BigSur, ADX
+
+SH-2000
+CONFIG_SH_SH2000
+ SH-2000 is a single-board computer based around SH7709A chip
+ intended for embedded applications.
+ It has an Ethernet interface (CS8900A), direct connected
+ Compact Flash socket, three serial ports and PC-104 bus.
+ More information at .
+
BareCPU
CONFIG_SH_UNKNOWN
"Bare CPU" aka "unknown" means an SH-based system which is not one
@@ -24259,6 +24276,14 @@
CONFIG_CPU_SUBTYPE_SH7750
Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
+SH7751
+CONFIG_CPU_SUBTYPE_SH7751
+ Select SH7750 if you have a 166 Mhz SH-4 HD6417751 CPU.
+
+ST40STB1
+CONFIG_CPU_SUBTYPE_ST40STB1
+ Select ST40STB1 if you have a ST40STB1 CPU.
+
Physical memory start address
CONFIG_MEMORY_START
Computers built with Hitachi SuperH processors always
@@ -24323,7 +24348,7 @@
The default setting of the HD64465 IO base address is 0xb0000000.
Do not change this unless you know what you are doing.
-
+
Early printk support
CONFIG_SH_EARLY_PRINTK
Say Y here to redirect kernel printk messages to the serial port
@@ -24365,6 +24390,75 @@
megabytes but allows you to load, run and debug the kernel image
remotely using gdb. This is only useful for kernel hackers. If
unsure, say N.
+
+Include KGDB kernel debugger
+CONFIG_SH_KGDB
+ If you say Y here, the system will be compiled with the debug option
+ (-g) and a debugging stub will be included in the kernel, making it
+ possible to debug remotely debug the SH kernel using GDB. This will
+ enlarge your kernel image disk size by several megabytes. To use
+ this feature you will need to perform some basic setup described
+ briefly in Documentation/sh/kgdb.txt; please refer to that file for
+ more information.
+
+ This is only useful for kernel hackers. If unsure, say N.
+
+Enable compile options
+CONFIG_KGDB_MORE
+ Saying yes here turns on the ability to enter additional compile options.
+
+Additional compile options
+CONFIG_KGDB_OPTIONS
+ This option allows you enter additional compile options for the whole
+ kernel compile. Note that by configuring KGDB "-g" is already turned
+ on, and "-fomit-frame-pointer" is removed if appropriate; this option
+ is not required for those changes.
+
+SysRq Gdb command
+CONFIG_KGDB_SYSRQ
+ This option includes an option in the SysRq code that allows you to
+ enter SysRq G which generates a breakpoint to the KGDB stub. This
+ option automatically enabled the Magic Sysrq option.
+
+Include KGDB thread support
+CONFIG_KGDB_THREAD
+ With thread analysis enabled, GDB can communicate with the kernel to
+ list threads and to get a stack trace for a thread. (Note that while
+ threads can be listed and their registers examined, only the thread
+ which entered KGDB can be executed -- i.e. continued or stepped.)
+
+Console messages through GDB
+CONFIG_SH_KGDB_CONSOLE
+ If you say Y here, console messages will appear through GDB.
+ Other consoles will continue to work as usual.
+
+ (Note: even without this option, if the console and KGDB are using
+ the same SCI/F [ttySCn] then console messages will be encapsulated
+ for GDB when the system is in GDB mode.)
+
+Include KGDB kernel asserts
+CONFIG_KGDB_KERNEL_ASSERTS
+ This option enables kernel asserts. A kernel assert is a condition,
+ which, if false during an execution path, results in a call to KGDB.
+
+ Kernel assertions help in modifying the kernel or writing drivers
+ - bugs can be traced sooner with kernel asserts because invalid
+ conditions are checked at various places. Kernel asserts add the
+ overhead of checking asserted conditions - you can disable this
+ option if you do not want the overhead. Kernel asserts are defined
+ in kgdb.h.
+
+Enter KGDB on NMI
+CONFIG_KGDB_NMI
+ This option allows an NMI to be used to enter KGDB, as used on the
+ Hitachi Solution Engine boards.
+
+Default KGDB port setup
+CONFIG_KGDB_DEFPORT
+ These options allow you to configure attributes of the KGDB serial
+ port; only ports ttySCn (e.g. ttySC0, ttySC1) can be selected here.
+ The kgdb option can be used on the command line to override these
+ settings, e.g. "kgdb=ttySC1,115200E7".
Console output to GDB
CONFIG_GDB_CONSOLE
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/Documentation/cachetlb.txt /usr/src/sh/7751/cvs/linux/Documentation/cachetlb.txt
--- /usr/src/sh/7751/cvs/linux-2.4.18/Documentation/cachetlb.txt Fri Dec 21 19:41:53 2001
+++ /usr/src/sh/7751/cvs/linux/Documentation/cachetlb.txt Thu Jan 24 12:15:32 2002
@@ -222,7 +222,7 @@
this value.
NOTE: This does not fix shared mmaps, check out the sparc64 port for
-one way to solve this (in particular SPARC_FLAG_MMAPSHARED).
+one way to solve this (in particular arch_get_unmapped_area).
Next, you have two methods to solve the D-cache aliasing issue for all
other cases. Please keep in mind that fact that, for a given page
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/Documentation/sh/kgdb.txt /usr/src/sh/7751/cvs/linux/Documentation/sh/kgdb.txt
--- /usr/src/sh/7751/cvs/linux-2.4.18/Documentation/sh/kgdb.txt Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/Documentation/sh/kgdb.txt Fri May 10 20:58:54 2002
@@ -0,0 +1,202 @@
+
+This file describes the configuration and behavior of KGDB for the SH
+kernel. Based on a description from Henry Bell , it
+has been modified to account for quirks in the current implementation.
+
+Version
+=======
+
+This version of KGDB was written for 2.4.xx kernels for the SH architecture.
+Further documentation is available from the linux-sh project website.
+
+
+Debugging Setup: Host
+======================
+
+The two machines will be connected together via a serial line - this
+should be a null modem cable i.e. with a twist.
+
+On your DEVELOPMENT machine, go to your kernel source directory and
+build the kernel, enabling KGDB support in the "kernel hacking" section.
+This includes the KGDB code, and also makes the kernel be compiled with
+the "-g" option set -- necessary for debugging.
+
+To install this new kernel, use the following installation procedure.
+
+Decide on which tty port you want the machines to communicate, then
+cable them up back-to-back using the null modem. On the DEVELOPMENT
+machine, you may wish to create an initialization file called .gdbinit
+(in the kernel source directory or in your home directory) to execute
+commonly-used commands at startup.
+
+A minimal .gdbinit might look like this:
+
+ file vmlinux
+ set remotebaud 115200
+ target remote /dev/ttyS0
+
+Change the "target" definition so that it specifies the tty port that
+you intend to use. Change the "remotebaud" definition to match the
+data rate that you are going to use for the com line (115200 is the
+default).
+
+Debugging Setup: Target
+========================
+
+By default, the KGDB stub will communicate with the host GDB using
+ttySC1 at 115200 baud, 8 databits, no parity; these defaults can be
+changed in the kernel configuration. As the kernel starts up, KGDB will
+initialize so that breakpoints, kernel segfaults, and so forth will
+generally enter the debugger.
+
+This behavior can be modified by including the "kgdb" option in the
+kernel command line; this option has the general form:
+
+ kgdb=,
+
+The indicates the port to use, and can optionally specify
+baud, parity and databits -- e.g. "ttySC0,9600N8" or "ttySC1,19200".
+
+The can be "halt" or "disabled". The "halt" action enters the
+debugger via a breakpoint as soon as kgdb is initialized; the "disabled"
+action causes kgdb to ignore kernel segfaults and such until explicitly
+entered by a breakpoint in the code or by external action (sysrq or NMI).
+
+(Both and can appear alone, w/o the separating comma.)
+
+For example, if you wish to debug early in kernel startup code, you
+might specify the halt option:
+
+ kgdb=halt
+
+Boot the TARGET machine, which will appear to hang.
+
+On your DEVELOPMENT machine, cd to the source directory and run the gdb
+program. (This is likely to be a cross GDB which runs on your host but
+is built for an SH target.) If everything is working correctly you
+should see gdb print out a few lines indicating that a breakpoint has
+been taken. It will actually show a line of code in the target kernel
+inside the gdbstub activation code.
+
+NOTE: BE SURE TO TERMINATE OR SUSPEND any other host application which
+may be using the same serial port (for example, a terminal emulator you
+have been using to connect to the target boot code.) Otherwise, data
+from the target may not all get to GDB!
+
+You can now use whatever gdb commands you like to set breakpoints.
+Enter "continue" to start your target machine executing again. At this
+point the target system will run at full speed until it encounters
+your breakpoint or gets a segment violation in the kernel, or whatever.
+
+Serial Ports: KGDB, Console
+============================
+
+This version of KGDB may not gracefully handle conflict with other
+drivers in the kernel using the same port. If KGDB is configured on the
+same port (and with the same parameters) as the kernel console, or if
+CONFIG_SH_KGDB_CONSOLE is configured, things should be fine (though in
+some cases console messages may appear twice through GDB). But if the
+KGDB port is not the kernel console and used by another serial driver
+which assumes different serial parameters (e.g. baud rate) KGDB may not
+recover.
+
+Also, when KGDB is entered via sysrq-g (requires CONFIG_KGDB_SYSRQ) and
+the kgdb port uses the same port as the console, detaching GDB will not
+restore the console to working order without the port being re-opened.
+
+Another serious consequence of this is that GDB currently CANNOT break
+into KGDB externally (e.g. via ^C or ); unless a breakpoint or
+error is encountered, the only way to enter KGDB after the initial halt
+(see above) is via NMI (CONFIG_KGDB_NMI) or sysrq-g (CONFIG_KGDB_SYSRQ).
+
+Code is included for the basic Hitachi Solution Engine boards to allow
+the use of ttyS0 for KGDB if desired; this is less robust, but may be
+useful in some cases. (This cannot be selected using the config file,
+but only through the kernel command line, e.g. "kgdb=ttyS0", though the
+configured defaults for baud rate etc. still apply if not overridden.)
+
+If gdbstub Does Not Work
+========================
+
+If it doesn't work, you will have to troubleshoot it. Do the easy
+things first like double checking your cabling and data rates. You
+might try some non-kernel based programs to see if the back-to-back
+connection works properly. Just something simple like cat /etc/hosts
+/dev/ttyS0 on one machine and cat /dev/ttyS0 on the other will tell you
+if you can send data from one machine to the other. There is no point
+in tearing out your hair in the kernel if the line doesn't work.
+
+If you need to debug the GDB/KGDB communication itself, the gdb commands
+"set debug remote 1" and "set debug serial 1" may be useful, but be
+warned: they produce a lot of output.
+
+Threads
+=======
+
+Each process in a target machine is seen as a gdb thread. gdb thread related
+commands (info threads, thread n) can be used. CONFIG_KGDB_THREAD must
+be defined for this to work.
+
+In this version, kgdb reports PID_MAX (32768) as the process ID for the
+idle process (pid 0), since GDB does not accept 0 as an ID.
+
+Detaching (exiting KGDB)
+=========================
+
+There are two ways to resume full-speed target execution: "continue" and
+"detach". With "continue", GDB inserts any specified breakpoints in the
+target code and resumes execution; the target is still in "gdb mode".
+If a breakpoint or other debug event (e.g. NMI) happens, the target
+halts and communicates with GDB again, which is waiting for it.
+
+With "detach", GDB does *not* insert any breakpoints; target execution
+is resumed and GDB stops communicating (does not wait for the target).
+In this case, the target is no longer in "gdb mode" -- for example,
+console messages no longer get sent separately to the KGDB port, or
+encapsulated for GDB. If a debug event (e.g. NMI) occurs, the target
+will re-enter "gdb mode" and will display this fact on the console; you
+must give a new "target remote" command to gdb.
+
+NOTE: TO AVOID LOSSING CONSOLE MESSAGES IN CASE THE KERNEL CONSOLE AND
+KGDB USING THE SAME PORT, THE TARGET WAITS FOR ANY INPUT CHARACTER ON
+THE KGDB PORT AFTER A DETACH COMMAND. For example, after the detach you
+could start a terminal emulator on the same host port and enter a ;
+however, this program must then be terminated or suspended in order to
+use GBD again if KGDB is re-entered.
+
+
+Additional variables
+=====================
+
+Some system data which may be useful during debug can be difficult to
+obtain through normal channels. For example, "current" is in r7_bank,
+and this version of KGDB does not allow access to bank registers.
+
+On entry into KGDB, several such items are saved in global variables so
+they can be easily viewed via GDB. (Note that in some cases the values
+will not be meaningful, and in many cases won't be necessary or useful;
+they are here as a convenience on the off chance they are required.)
+
+ kgdb_current -- content of r7_bank (current task_struct pointer)
+ kgdb_g_imask -- content of r6_bank (used by some IRQ code)
+ kgdb_excode -- content of r2_bank (exception code)
+ kgdb_trapa_val -- content of TRA register (trap code)
+ kgdb_tregs -- pt_regs passed to kgdb (from current task)
+
+Also, if thread support is enabled and you have used GDB "thread" to
+change the thread registers being displayed, "current_thread" will point
+to the task_struct of that thread.
+
+
+Acknowledgements
+================
+
+This code was mostly generated by Henry Bell ;
+largely from KGDB by Amit S. Kale - extracts from
+code by Glenn Engel, Jim Kingdon, David Grothe , Tigran
+Aivazian , William Gatliff , Ben
+Lee, Steve Chamberlain and Benoit Miller are also
+included.
+
+Jeremy Siegel
+
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/Documentation/sh/new-machine.txt /usr/src/sh/7751/cvs/linux/Documentation/sh/new-machine.txt
--- /usr/src/sh/7751/cvs/linux-2.4.18/Documentation/sh/new-machine.txt Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/Documentation/sh/new-machine.txt Mon Oct 15 22:44:46 2001
@@ -0,0 +1,77 @@
+The multiple machine support relies on redirecting all functions which will
+need to be machine specific through a table of function pointers, the
+machvec. These functions fall into a number of categories:
+
+ - I/O functions to IO memory (inb etc) and PCI/main memory (readb etc).
+ - I/O remapping functions (ioremap etc)
+ - some initialisation functions
+ - a 'heartbeat' function
+ - some miscellaneous flags
+
+The tree can be built in two ways:
+ - as a fully generic build. All drivers are linked in, and all functions
+ go through the machvec
+ - as a machine specific build. In this case only the required drivers
+ will be linked in, and some macros may be redefined to not go through
+ the machvec where performance is important (in particular IO functions).
+
+There are three ways in which IO can be performed:
+ - none at all. This is really only useful for the 'unknown' machine type,
+ which us designed to run on a machine about which we know nothing, and
+ so all all IO instructions do nothing.
+ - fully custom. In this case all IO functions go to a machine specific
+ set of functions which can do what they like
+ - a generic set of functions. These will cope with most situations,
+ and rely on a single function, mv_port2addr, which is called through the
+ machine vector, and converts an IO address into a memory address, which
+ can be read from/written to directly.
+
+Thus adding a new machine involves the following steps (I will assume I am
+adding a machine called fred):
+
+ - add a new file include/asm-sh/io_fred.h which contains prototypes for
+ any machine specific IO functions prefixed with the machine name, for
+ example fred_inb. These will be needed when filling out the machine
+ vector. In addition, a section is required which defines what to do when
+ building a machine specific version. For example:
+
+ #ifdef __WANT_IO_DEF
+ #define inb fred_inb
+ ...
+ #endif
+
+ This is the minimum that is required, however there are ample
+ opportunities to optimise this. In particular, by making the prototypes
+ inline function definitions, it is possible to inline the function when
+ building machine specific versions. Note that the machine vector
+ functions will still be needed, so that a module built for a generic
+ setup can be loaded.
+
+ - add a new file arch/sh/kernel/mach_fred.c. This contains the definition
+ of the machine vector. When building the machine specific version, this
+ will be the real machine vector (via an alias), while in the generic
+ version is used to initialise the machine vector, and then freed, by
+ making it initdata. This should be defined as:
+
+ struct sh_machine_vector mv_fred __initmv = {
+ mv_name: "Fred"
+ }
+ ALIAS_MV(se)
+
+ - finally add a file arch/sh/kernel/io_fred.c, which contains
+ definitions of the machine specific io functions.
+
+A note about initialisation functions. Three initialisation functions are
+provided in the machine vector:
+ - mv_arch_init - called very early on from setup_arch
+ - mv_init_irq - called from init_IRQ, after the generic SH interrupt
+ initialisation
+ - mv_init_pci - currently not used
+
+Any other remaining functions which need to be called at start up can be
+added to the list using the __initcalls macro (or module_init if the code
+can be built as a module). Many generic drivers probe to see if the device
+they are targeting is present, however this may not always be appropriate,
+so a flag can be added to the machine vector which will be set on those
+machines which have the hardware in question, reducing the probe to a
+single conditional.
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/Makefile /usr/src/sh/7751/cvs/linux/Makefile
--- /usr/src/sh/7751/cvs/linux-2.4.18/Makefile Mon Feb 25 21:37:52 2002
+++ /usr/src/sh/7751/cvs/linux/Makefile Fri May 17 15:47:46 2002
@@ -1,11 +1,12 @@
VERSION = 2
PATCHLEVEL = 4
SUBLEVEL = 18
-EXTRAVERSION =
+EXTRAVERSION = -sh
KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
ARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ -e s/arm.*/arm/ -e s/sa110/arm/)
+ARCH := sh
KERNELPATH=kernel-$(shell echo $(KERNELRELEASE) | sed -e "s/-//g")
CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
@@ -19,7 +20,7 @@
HOSTCC = gcc
HOSTCFLAGS = -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer
-CROSS_COMPILE =
+CROSS_COMPILE = sh4-linux-
#
# Include the make variables (CC, etc...)
@@ -185,6 +186,7 @@
DRIVERS-$(CONFIG_MD) += drivers/md/mddev.o
DRIVERS-$(CONFIG_BLUEZ) += drivers/bluetooth/bluetooth.o
DRIVERS-$(CONFIG_HOTPLUG_PCI) += drivers/hotplug/vmlinux-obj.o
+DRIVERS-$(CONFIG_MAPLE) += drivers/maple/maplebus.o
DRIVERS := $(DRIVERS-y)
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/Makefile /usr/src/sh/7751/cvs/linux/arch/sh/Makefile
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/Makefile Mon Oct 15 22:36:48 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/Makefile Fri May 10 20:58:54 2002
@@ -1,4 +1,4 @@
-# $Id: Makefile,v 1.6 2000/06/10 03:03:52 gniibe Exp $
+# $Id: Makefile,v 1.1.1.1.2.2 2002/05/10 17:58:54 jzs Exp $
#
# This file is subject to the terms and conditions of the GNU General Public
# License. See the file "COPYING" in the main directory of this archive
@@ -22,6 +22,14 @@
AFLAGS += -mb
# LINKFLAGS += -EB
LDFLAGS := -EB
+endif
+
+ifdef CONFIG_SH_KGDB
+CFLAGS :=$(CFLAGS:-fomit-frame-pointer=) -g
+AFLAGS += -g
+ifdef CONFIG_KGDB_MORE
+CFLAGS += $(shell echo $(CONFIG_KGDB_OPTIONS) | sed -e 's/"//g')
+endif
endif
LD =$(CROSS_COMPILE)ld $(LDFLAGS)
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/boot/compressed/misc.c /usr/src/sh/7751/cvs/linux/arch/sh/boot/compressed/misc.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/boot/compressed/misc.c Sat Jul 22 00:21:06 2000
+++ /usr/src/sh/7751/cvs/linux/arch/sh/boot/compressed/misc.c Wed May 29 10:41:37 2002
@@ -147,10 +147,28 @@
{
sh_bios_console_write(s, strlen(s));
}
+#elif defined(CONFIG_SH_EARLY_PUTS_SCIF)
+#define TDFE 0x20
+void puts(const char *s)
+{
+ char *SCFTDR2;
+ volatile unsigned short *SCFSR2;
+
+ while (*s) {
+
+ SCFTDR2 = (char *)0xffe8000c;
+ SCFSR2 = (unsigned short *)0xffe80010;
+
+ while ( ((*SCFSR2) & TDFE) == 0 );
+
+ *SCFTDR2 = *s;
+ *SCFSR2 = ~TDFE;
+ s++;
+ }
+}
#else
void puts(const char *s)
{
- /* This should be updated to use the sh-sci routines */
}
#endif
@@ -234,5 +252,5 @@
makecrc();
puts("Uncompressing Linux... ");
gunzip();
- puts("Ok, booting the kernel.\n");
+ puts("Ok, booting the kernel.\r\n");
}
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/config.in /usr/src/sh/7751/cvs/linux/arch/sh/config.in
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/config.in Mon Feb 25 21:37:56 2002
+++ /usr/src/sh/7751/cvs/linux/arch/sh/config.in Sun Jun 23 12:21:53 2002
@@ -43,10 +43,11 @@
BigSur CONFIG_SH_BIGSUR \
SH2000 CONFIG_SH_SH2000 \
ADX CONFIG_SH_ADX \
+ FlexBox CONFIG_SH_FLEXBOX \
BareCPU CONFIG_SH_UNKNOWN" Generic
# The SH7750 RTC module is disabled in the Dreamcast
-if [ "$CONFIG_SH_DREAMCAST" = "y" ]; then
+if [ "CONFIG_SH_DREAMCAST" = "y" ]; then
define_bool CONFIG_SH_RTC n
else
define_bool CONFIG_SH_RTC y
@@ -119,6 +120,11 @@
define_hex CONFIG_MEMORY_SIZE 00400000
define_bool CONFIG_MEMORY_SET y
fi
+if [ "$CONFIG_SH_FLEXBOX" = "y" ]; then
+ define_hex CONFIG_MEMORY_START 08000000
+ define_hex CONFIG_MEMORY_SIZE 08000000
+ define_bool CONFIG_MEMORY_SET y
+fi
# If none of the above have set memory start/size, ask the user.
if [ "$CONFIG_MEMORY_SET" != "y" ]; then
hex 'Physical memory start address' CONFIG_MEMORY_START 08000000
@@ -147,7 +153,7 @@
if [ "$CONFIG_SH_GENERIC" = "y" -o "$CONFIG_SH_SOLUTION_ENGINE" = "y" -o \
"$CONFIG_SH_UNKNOWN" = "y" -o "$CONFIG_SH_CAT68701" = "y" -o \
- "$CONFIG_SH_ADX" = "y" ]; then
+ "$CONFIG_SH_ADX" = "y" -o "$CONFIG_SH_FLEXBOX" = "y" ]; then
bool 'Compact Flash Enabler support' CONFIG_CF_ENABLER
fi
@@ -280,9 +286,9 @@
#
source drivers/input/Config.in
-# if [ "$CONFIG_SH_DREAMCAST" = "y" ]; then
-# source drivers/maple/Config.in
-# fi
+if [ "$CONFIG_SH_DREAMCAST" = "y" ]; then
+ source drivers/maple/Config.in
+fi
mainmenu_option next_comment
comment 'Character devices'
@@ -381,8 +387,36 @@
comment 'Kernel hacking'
bool 'Magic SysRq key' CONFIG_MAGIC_SYSRQ
+bool 'Use SCIF for puts() before console' CONFIG_SH_EARLY_PUTS_SCIF
bool 'Use LinuxSH standard BIOS' CONFIG_SH_STANDARD_BIOS
if [ "$CONFIG_SH_STANDARD_BIOS" = "y" ]; then
bool 'Early printk support' CONFIG_SH_EARLY_PRINTK
+fi
+bool 'Include KGDB kernel debugger' CONFIG_SH_KGDB
+if [ "$CONFIG_SH_KGDB" = "y" ]; then
+ bool ' Enter KGDB on NMI' CONFIG_KGDB_NMI
+ bool ' Include KGDB thread support' CONFIG_KGDB_THREAD
+ bool ' Console messages through GDB' CONFIG_SH_KGDB_CONSOLE
+ bool ' Allow SysRq "G" to enter KGDB?' CONFIG_KGDB_SYSRQ
+ if [ "$CONFIG_KGDB_SYSRQ" != "n" ]; then
+ define_bool CONFIG_MAGIC_SYSRQ y
+ fi
+ bool ' Include KGDB kernel asserts' CONFIG_KGDB_KERNEL_ASSERTS
+ bool ' Add additional compile options' CONFIG_KGDB_MORE
+ if [ "$CONFIG_KGDB_MORE" = "y" ]; then
+ string ' Additional compile options' CONFIG_KGDB_OPTIONS "-O1"
+ fi
+ mainmenu_option next_comment
+ comment ' Default KGDB port setup'
+ int 'Port number (ttySCn)' CONFIG_KGDB_DEFPORT 1
+ int 'Baud rate' CONFIG_KGDB_DEFBAUD 115200
+ choice 'Parity' \
+ "None CONFIG_KGDB_DEFPARITY_N \
+ Even CONFIG_KGDB_DEFPARITY_E \
+ Odd CONFIG_KGDB_DEFPARITY_O" None
+ choice 'DataBits' \
+ "7 CONFIG_KGDB_DEFBITS_7 \
+ 8 CONFIG_KGDB_DEFBITS_8" 8
+ endmenu
fi
endmenu
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/Makefile /usr/src/sh/7751/cvs/linux/arch/sh/kernel/Makefile
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/Makefile Sat Sep 8 22:29:09 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/Makefile Sun Jun 23 13:00:33 2002
@@ -12,7 +12,8 @@
O_TARGET := kernel.o
-export-objs := io.o io_generic.o io_hd64461.o setup_hd64461.o sh_ksyms.o
+export-objs := io.o io_generic.o io_hd64461.o setup_hd64461.o sh_ksyms.o \
+ rtc-flexbox.o
obj-y := process.o signal.o entry.o traps.o irq.o irq_ipr.o \
ptrace.o setup.o time.o sys_sh.o semaphore.o \
@@ -23,6 +24,7 @@
obj-$(CONFIG_SH_RTC) += rtc.o
obj-$(CONFIG_SH_DMA) += dma.o
obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o
+obj-$(CONFIG_SH_KGDB) += kgdb_stub.o kgdb_jmp.o
ifeq ($(CONFIG_PCI),y)
ifeq ($(CONFIG_SH_DREAMCAST),y)
@@ -61,6 +63,11 @@
obj-$(CONFIG_SH_UNKNOWN) += mach_unknown.o io_unknown.o
machine-specific-objs += mach_unknown.o io_unknown.o
+
+obj-$(CONFIG_SH_FLEXBOX) += mach_flexbox.o io_flexbox.o pci-flexbox.o setup_flexbox.o \
+ rtc-flexbox.o
+machine-specific-objs += mach_flexbox.o io_flexbox.o pci-flexbox.o setup_flexbox.o \
+ rtc-flexbox.o
obj-$(CONFIG_HD64461) += setup_hd64461.o io_hd64461.o
machine-specific-objs += setup_hd64461.o io_hd64461.o
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/cf-enabler.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/cf-enabler.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/cf-enabler.c Sat Sep 8 22:29:09 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/cf-enabler.c Mon Oct 15 22:44:47 2001
@@ -1,4 +1,4 @@
-/* $Id: cf-enabler.c,v 1.8 2001/07/18 12:32:21 gniibe Exp $
+/* $Id: cf-enabler.c,v 1.1.1.1 2001/10/15 20:44:47 mrbrown Exp $
*
* linux/drivers/block/cf-enabler.c
*
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/entry.S /usr/src/sh/7751/cvs/linux/arch/sh/kernel/entry.S
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/entry.S Mon Oct 8 19:39:18 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/entry.S Fri May 10 20:58:54 2002
@@ -1,4 +1,4 @@
-/* $Id: entry.S,v 1.71 2001/07/27 11:47:50 gniibe Exp $
+/* $Id: entry.S,v 1.1.1.1.2.4 2002/05/10 17:58:54 jzs Exp $
*
* linux/arch/sh/entry.S
*
@@ -15,12 +15,6 @@
#include
-/*
- * Define this to turn on compatibility with the previous
- * system call ABI. This feature is not properly maintained.
- */
-#undef COMPAT_OLD_SYSCALL_ABI
-
! NOTE:
! GNU as (as of 2.9.1) changes bf/s into bt/s and bra, when the address
! to be jumped is too far, but it causes illegal slot exception.
@@ -66,7 +60,6 @@
tsk_ptrace = 24
PT_TRACESYS = 0x00000002
-PF_USEDFPU = 0x00100000
ENOSYS = 38
EINVAL = 22
@@ -87,6 +80,10 @@
MMU_TEA = 0xff00000c ! TLB Exception Address Register
#endif
+#if defined(CONFIG_KGDB_NMI)
+NMI_VEC = 0x1c0 ! Must catch early for debounce
+#endif
+
/* Offsets to the stack */
OFF_R0 = 0 /* Return value. New ABI also arg4 */
OFF_R1 = 4 /* New ABI: arg5 */
@@ -98,7 +95,7 @@
OFF_R7 = 28 /* New ABI: arg3 */
OFF_SP = (15*4)
OFF_SR = (16*4+8)
-SYSCALL_NR = (16*4+6*4)
+OFF_TRA = (16*4+6*4)
#define k0 r0
@@ -220,10 +217,36 @@
1: .long MMU_TEA
2: .long SYMBOL_NAME(do_address_error)
-#if defined(CONFIG_SH_STANDARD_BIOS)
+
+#if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
+! Handle kernel debug if either kgdb (SW) or gdb-stub (FW) is present.
+! If both are configured, handle the debug traps (breakpoints) in SW,
+! but still allow BIOS traps to FW.
+
.align 2
- /* Unwind the stack and jmp to the debug entry */
debug_kernel:
+#if defined(CONFIG_SH_STANDARD_BIOS) && defined(CONFIG_SH_KGDB)
+ /* Force BIOS call to FW (debug_trap put TRA in r8) */
+ mov r8,r0
+ shlr2 r0
+ cmp/eq #0x3f,r0
+ bt debug_kernel_fw
+#endif /* CONFIG_SH_STANDARD_BIOS && CONFIG_SH_KGDB */
+
+debug_enter:
+#if defined(CONFIG_SH_KGDB)
+ /* Jump to kgdb, pass stacked regs as arg */
+debug_kernel_sw:
+ mov.l 3f, r0
+ jmp @r0
+ mov r15, r4
+ .align 2
+3: .long SYMBOL_NAME(kgdb_handle_exception)
+#endif /* CONFIG_SH_KGDB */
+
+#if defined(CONFIG_SH_STANDARD_BIOS)
+ /* Unwind the stack and jmp to the debug entry */
+debug_kernel_fw:
mov.l @r15+, r0
mov.l @r15+, r1
mov.l @r15+, r2
@@ -259,11 +282,14 @@
.align 2
1: .long 0x300000f0
2: .long SYMBOL_NAME(gdb_vbr_vector)
-#endif
+#endif /* CONFIG_SH_STANDARD_BIOS */
+
+#endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
+
.align 2
debug_trap:
-#if defined(CONFIG_SH_STANDARD_BIOS)
+#if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
mov #OFF_SR, r0
mov.l @(r0,r15), r0 ! get status register
shll r0
@@ -346,29 +372,15 @@
mov.l @r9, r8
!
! Is the trap argument >= 0x20? (TRA will be >= 0x80)
- mov #0x20, r9
- extu.b r9, r9
- shll2 r9
- cmp/hs r9, r8
+ mov #0x7f, r9
+ cmp/hi r9, r8
bt debug_trap
!
- mov #SYSCALL_NR, r14
+ mov #OFF_TRA, r14
add r15, r14
!
-#ifdef COMPAT_OLD_SYSCALL_ABI
- mov #0x40, r9
- cmp/hs r9, r8
- bf/s old_abi_system_call
- nop
-#endif
! New Syscall ABI
- add #-0x40, r8
- shlr2 r8
- shll8 r8
- shll8 r8 ! r8 = num_args<<16
- mov r3, r10
- or r8, r10 ! Encode syscall # and # of arguments
- mov.l r10, @r14 ! set syscall_nr
+ mov.l r8, @r14 ! set tra
STI()
!
stc k_current, r11
@@ -427,74 +439,6 @@
jmp @r1 ! Call syscall_trace() which notifies superior
lds r0, pr ! Then return to ret_from_syscall()
-
-
-#ifdef COMPAT_OLD_SYSCALL_ABI
-! Handle old ABI system call.
-! Note that ptrace(SYSCALL) is not supported for the old ABI.
-! At this point:
-! r0, r4-7 as per ABI
-! r8 = value of TRA register (= num_args<<2)
-! r14 = points to SYSCALL_NR in stack frame
-old_abi_system_call:
- mov r0, r9 ! Save system call number in r9
- ! ! arrange for return which pops stack
- mov.l __old_abi_syscall_ret, r10
- lds r10, pr
- ! Build the stack frame if TRA > 0
- mov r8, r10
- cmp/pl r10
- bf 0f
- mov.l @(OFF_SP,r15), r0 ! get original user stack
-7: add #-4, r10
-4: mov.l @(r0,r10), r1 ! May cause address error exception..
- mov.l r1, @-r15
- cmp/pl r10
- bt 7b
-0:
- mov.l r9, @r14 ! set syscall_nr
- STI()
- ! Call the system call handler through the table.
- ! First check for bad syscall number
- mov.l __n_sys, r10
- cmp/hs r10, r9
- bf 2f
- ! Bad syscall number
- rts ! return to old_abi_syscall_ret
- mov #-ENOSYS, r0
- ! Good syscall number
-2: shll2 r9 ! x4
- mov.l __sct, r11
- add r11, r9
- mov.l @r9, r11
- jmp @r11 ! call specific syscall handler,
- nop
-
- .align 2
-__old_abi_syscall_ret:
- .long old_abi_syscall_ret
-
- ! This code gets called on address error exception when copying
- ! syscall arguments from user stack to kernel stack. It is
- ! supposed to return -EINVAL through old_abi_syscall_ret, but it
- ! appears to have been broken for a long time in that the r0
- ! return value will be saved into the kernel stack relative to r15
- ! but the value of r15 is not correct partway through the loop.
- ! So the user prog is returned its old r0 value, not -EINVAL.
- ! Greg Banks 28 Aug 2000.
- .section .fixup,"ax"
-fixup_syscall_argerr:
- ! First get r15 back to
- rts
- mov #-EINVAL, r0
- .previous
-
- .section __ex_table, "a"
- .align 2
- .long 4b,fixup_syscall_argerr
- .previous
-#endif
-
.align 2
__TRA: .long TRA
__syscall_trace:
@@ -530,11 +474,6 @@
nop
.align 2
-#ifdef COMPAT_OLD_SYSCALL_ABI
-old_abi_syscall_ret:
- add r8, r15 ! pop off the arguments
- /* fall through */
-#endif
syscall_ret:
mov.l r0, @(OFF_R0,r15) ! save the return value
/* fall through */
@@ -567,12 +506,6 @@
.align 2
restore_all:
-#if defined(__SH4__)
- mov.l __fpu_prepare_fd, r0
- jsr @r0
- stc sr, r4
-#endif
- !
mov.l @r15+, r0
mov.l @r15+, r1
mov.l @r15+, r2
@@ -585,7 +518,7 @@
stc sr, r8
mov.l __blrb_flags, r9 ! BL =1, RB=1
or r9, r8
- ldc r8, sr ! here, change the register bank
+ ldc r8, sr ! here, change the register bank
!
mov.l @r15+, r8
mov.l @r15+, r9
@@ -594,25 +527,25 @@
mov.l @r15+, r12
mov.l @r15+, r13
mov.l @r15+, r14
- mov.l @r15+, k4 ! original stack pointer
+ mov.l @r15+, k4 ! original stack pointer
ldc.l @r15+, spc
lds.l @r15+, pr
- mov.l @r15+, k3 ! original SR
+ mov.l @r15+, k3 ! original SR
ldc.l @r15+, gbr
lds.l @r15+, mach
lds.l @r15+, macl
- add #4, r15 ! Skip syscall number
+ add #4, r15 ! Skip syscall number
!
! Calculate new SR value
- mov k3, k2 ! original SR value
+ mov k3, k2 ! original SR value
mov.l 1f, k1
stc sr, k0
- and k1, k0 ! Get current FD-bit
+ and k1, k0 ! Get current FD-bit
mov.l 2f, k1
- and k1, k2 ! Mask orignal SR value
- or k0, k2 ! Inherit current FD-bit
+ and k1, k2 ! Mask orignal SR value
+ or k0, k2 ! Inherit current FD-bit
!
- mov k3, k0 ! Calculate IMASK-bits
+ mov k3, k0 ! Calculate IMASK-bits
shlr2 k0
and #0x3c, k0
cmp/eq #0x3c, k0
@@ -620,54 +553,14 @@
shll2 k0
mov g_imask, k0
!
-7: or k0, k2 ! Set the IMASK-bits
+7: or k0, k2 ! Set the IMASK-bits
ldc k2, ssr
!
-#if defined(__SH4__)
- shll k2
- shll k2
- bf 9f ! user mode
- /* Kernel to kernel transition */
- mov.l 1f, k1
- tst k1, k3
- bf 9f ! it hadn't FPU
- ! Kernel to kernel and FPU was used
- ! There's the case we don't get FPU now
- stc sr, k2
- tst k1, k2
- bt 8f
- ! We need to grab FPU here
- xor k1, k2
- ldc k2, sr ! Grab FPU
- mov.l __init_task_flags, k1
- mov.l @k1, k2
- mov.l __PF_USEDFPU, k0
- or k0, k2
- mov.l k2, @k1 ! Set init_task.flags |= PF_USEDFPU
- !
- ! Restoring FPU...
- !
-8: mov.l 3f, k1
- lds k1, fpscr
- fmov.s @r15+, fr0
- fmov.s @r15+, fr1
- fmov.s @r15+, fr2
- fmov.s @r15+, fr3
- fmov.s @r15+, fr4
- fmov.s @r15+, fr5
- fmov.s @r15+, fr6
- fmov.s @r15+, fr7
- fmov.s @r15+, fr8
- fmov.s @r15+, fr9
- fmov.s @r15+, fr10
- fmov.s @r15+, fr11
- fmov.s @r15+, fr12
- fmov.s @r15+, fr13
- fmov.s @r15+, fr14
- fmov.s @r15+, fr15
- lds.l @r15+, fpscr
- lds.l @r15+, fpul
-9:
+#if defined(CONFIG_KGDB_NMI)
+ ! Clear in_nmi
+ mov.l 4f, k0
+ mov #0, k1
+ mov.b k1, @k0
#endif
mov k4, r15
rte
@@ -675,17 +568,13 @@
.align 2
__blrb_flags: .long 0x30000000
-#if defined(__SH4__)
-__fpu_prepare_fd:
- .long SYMBOL_NAME(fpu_prepare_fd)
-__init_task_flags:
- .long SYMBOL_NAME(init_task_union)+4
-__PF_USEDFPU:
- .long PF_USEDFPU
-#endif
1: .long 0x00008000 ! FD
2: .long 0xffff7f0f ! ~(IMASK+FD)
3: .long 0x00080000 ! SZ=0, PR=1
+#if defined(CONFIG_KGDB_NMI)
+4: .long SYMBOL_NAME(in_nmi)
+#endif
+
! Exception Vector Base
!
@@ -717,6 +606,22 @@
interrupt:
mov.l 2f, k2
mov.l 3f, k3
+#if defined(CONFIG_KGDB_NMI)
+ ! Debounce (filter nested NMI)
+ mov.l @k2, k0
+ mov.l 5f, k1
+ cmp/eq k1, k0
+ bf 0f
+ mov.l 6f, k1
+ tas.b @k1
+ bt 0f
+ rte
+ nop
+ .align 2
+5: .long NMI_VEC
+6: .long SYMBOL_NAME(in_nmi)
+0:
+#endif /* defined(CONFIG_KGDB_NMI) */
bra handle_exception
mov.l @k2, k2
@@ -732,61 +637,21 @@
! Using k0, k1 for scratch registers (r0_bank1, r1_bank),
! save all registers onto stack.
!
- stc ssr, k0 ! from kernel space?
- shll k0 ! Check MD bit (bit30) by shifting it into the T bit
- shll k0
-#if defined(__SH4__)
- bf/s 8f ! it's from user to kernel transition
- mov r15, k0 ! save original stack to k0
- /* It's a kernel to kernel transition. */
- /* Is the FPU disabled? */
- mov.l 2f, k1
- stc ssr, k0
- tst k1, k0
- mov.l 4f, k1
- bf/s 9f ! FPU is not enabled, no need to save it
- mov r15, k0 ! save original stack to k0
- ! FPU is enabled, save it
- ! /* XXX: Need to save another bank of FPU if all FPU feature is used */
- ! /* Currently it's not the case for GCC (only udivsi3_i4, divsi3_i4) */
- sts.l fpul, @-r15
- sts.l fpscr, @-r15
- mov.l 6f, k1
- lds k1, fpscr
- mov.l 3f, k1
- fmov.s fr15, @-r15
- fmov.s fr14, @-r15
- fmov.s fr13, @-r15
- fmov.s fr12, @-r15
- fmov.s fr11, @-r15
- fmov.s fr10, @-r15
- fmov.s fr9, @-r15
- fmov.s fr8, @-r15
- fmov.s fr7, @-r15
- fmov.s fr6, @-r15
- fmov.s fr5, @-r15
- fmov.s fr4, @-r15
- fmov.s fr3, @-r15
- fmov.s fr2, @-r15
- fmov.s fr1, @-r15
- bra 9f
- fmov.s fr0, @-r15
-#else
- mov.l 3f, k1
- bt/s 9f ! it's a kernel to kernel transition, and skip the FPU save.
- mov r15, k0 ! save original stack to k0 anyway
-#endif
-8: /* User space to kernel */
+ stc ssr, k0 ! Is it from kernel space?
+ shll k0 ! Check MD bit (bit30) by shifting it into...
+ shll k0 ! ...the T bit
+ bt/s 9f ! It's a kernel to kernel transition.
+ mov r15, k0 ! save original stack to k0
+ /* User space to kernel */
mov #0x20, k1
- shll8 k1 ! k1 <= 8192 == THREAD_SIZE
+ shll8 k1 ! k1 <= 8192 == THREAD_SIZE
add current, k1
mov k1, r15 ! change to kernel stack
!
- mov.l 4f, k1 ! let kernel release FPU
-9: ! Save the user registers on the stack.
- ! At this point, k1 should have been set to the new SR value
- mov #-1, k4
- mov.l k4, @-r15 ! syscall_nr (default: -1)
+9: mov #-1, k4
+ mov.l 3f, k1
+ ! Save the user registers on the stack.
+ mov.l k4, @-r15 ! Set tra (default: -1)
!
sts.l macl, @-r15
sts.l mach, @-r15
@@ -806,11 +671,11 @@
mov.l r9, @-r15
mov.l r8, @-r15
!
- stc sr, r8 ! Back to normal register bank, and
- or k1, r8 ! Block all interrupts, may release FPU
+ stc sr, r8 ! Back to normal register bank, and
+ or k1, r8 ! Block all interrupts
mov.l 5f, k1
- and k1, r8 ! ...
- ldc r8, sr ! ...changed here.
+ and k1, r8 ! ...
+ ldc r8, sr ! ...changed here.
!
mov.l r7, @-r15
mov.l r6, @-r15
@@ -831,9 +696,7 @@
nop
.align 2
1: .long SYMBOL_NAME(exception_handling_table)
-2: .long 0x00008000 ! FD=1
3: .long 0x000000f0 ! FD=0, IMASK=15
-4: .long 0x000080f0 ! FD=1, IMASK=15
5: .long 0xcfffffff ! RB=0, BL=0
6: .long 0x00080000 ! SZ=0, PR=1
@@ -862,7 +725,11 @@
.long error ! reserved_instruction (filled by trap_init)
.long error ! illegal_slot_instruction (filled by trap_init)
ENTRY(nmi_slot)
+#if defined (CONFIG_KGDB_NMI)
+ .long debug_enter ! Allow trap to debugger
+#else
.long none ! Not implemented yet
+#endif
ENTRY(user_break_point_trap)
.long break_point_trap
ENTRY(interrupt_table)
@@ -1298,6 +1165,10 @@
.long SYMBOL_NAME(sys_madvise)
.long SYMBOL_NAME(sys_getdents64) /* 220 */
.long SYMBOL_NAME(sys_fcntl64)
+ .long SYMBOL_NAME(sys_ni_syscall) /* reserved for TUX */
+ .long SYMBOL_NAME(sys_ni_syscall) /* Reserved for Security */
+ .long SYMBOL_NAME(sys_gettid)
+ .long SYMBOL_NAME(sys_readahead) /* 225 */
/*
* NOTE!! This doesn't have to be exact - we just have
@@ -1305,7 +1176,7 @@
* entries. Don't panic if you notice that this hasn't
* been shrunk every time we add a new system call.
*/
- .rept NR_syscalls-221
+ .rept NR_syscalls-(.-sys_call_table)/4
.long SYMBOL_NAME(sys_ni_syscall)
.endr
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/fpu.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/fpu.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/fpu.c Mon Jan 29 04:56:00 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/fpu.c Fri Jan 25 02:51:42 2002
@@ -1,4 +1,4 @@
-/* $Id: fpu.c,v 1.29 2000/03/22 13:42:10 gniibe Exp $
+/* $Id: fpu.c,v 1.1.1.1.2.1 2002/01/25 00:51:42 gniibe Exp $
*
* linux/arch/sh/kernel/fpu.c
*
@@ -18,6 +18,10 @@
#include
#include
+/*
+ * Save FPU registers onto task structure.
+ * Assume called with FPU enabled (SR.FD=0).
+ */
void
save_fpu(struct task_struct *tsk)
{
@@ -118,7 +122,8 @@
* double precission represents signaling NANS.
*/
-void fpu_init(void)
+static void
+fpu_init(void)
{
asm volatile("lds %0, fpul\n\t"
"lds %1, fpscr\n\t"
@@ -160,15 +165,125 @@
: "r" (0), "r" (FPSCR_INIT));
}
+/**
+ * denormal_to_double - Given denormalized float number,
+ * store double float
+ *
+ * @fpu: Pointer to sh_fpu_hard structure
+ * @n: Index to FP register
+ */
+static void
+denormal_to_double (struct sh_fpu_hard_struct *fpu, int n)
+{
+ unsigned long du, dl;
+ unsigned long x = fpu->fpul;
+ int exp = 1023 - 126;
+
+ if (x != 0 && (x & 0x7f800000) == 0) {
+ du = (x & 0x80000000);
+ while ((x & 0x00800000) == 0) {
+ x <<= 1;
+ exp--;
+ }
+ x &= 0x007fffff;
+ du |= (exp << 20) | (x >> 3);
+ dl = x << 29;
+
+ fpu->fp_regs[n] = du;
+ fpu->fp_regs[n+1] = dl;
+ }
+}
+
+/**
+ * ieee_fpe_handler - Handle denormalized number exception
+ *
+ * @regs: Pointer to register structure
+ *
+ * Returns 1 when it's handled (should not cause exception).
+ */
+static int
+ieee_fpe_handler (struct pt_regs *regs)
+{
+ unsigned short insn = *(unsigned short *) regs->pc;
+ unsigned short finsn;
+ unsigned long nextpc;
+ int nib[4] = {
+ (insn >> 12) & 0xf,
+ (insn >> 8) & 0xf,
+ (insn >> 4) & 0xf,
+ insn & 0xf};
+
+ if (nib[0] == 0xb ||
+ (nib[0] == 0x4 && nib[2] == 0x0 && nib[3] == 0xb)) /* bsr & jsr */
+ regs->pr = regs->pc + 4;
+
+ if (nib[0] == 0xa || nib[0] == 0xb) { /* bra & bsr */
+ nextpc = regs->pc + 4 + ((short) ((insn & 0xfff) << 4) >> 3);
+ finsn = *(unsigned short *) (regs->pc + 2);
+ } else if (nib[0] == 0x8 && nib[1] == 0xd) { /* bt/s */
+ if (regs->sr & 1)
+ nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1);
+ else
+ nextpc = regs->pc + 4;
+ finsn = *(unsigned short *) (regs->pc + 2);
+ } else if (nib[0] == 0x8 && nib[1] == 0xf) { /* bf/s */
+ if (regs->sr & 1)
+ nextpc = regs->pc + 4;
+ else
+ nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1);
+ finsn = *(unsigned short *) (regs->pc + 2);
+ } else if (nib[0] == 0x4 && nib[3] == 0xb &&
+ (nib[2] == 0x0 || nib[2] == 0x2)) { /* jmp & jsr */
+ nextpc = regs->regs[nib[1]];
+ finsn = *(unsigned short *) (regs->pc + 2);
+ } else if (nib[0] == 0x0 && nib[3] == 0x3 &&
+ (nib[2] == 0x0 || nib[2] == 0x2)) { /* braf & bsrf */
+ nextpc = regs->pc + 4 + regs->regs[nib[1]];
+ finsn = *(unsigned short *) (regs->pc + 2);
+ } else if (insn == 0x000b) { /* rts */
+ nextpc = regs->pr;
+ finsn = *(unsigned short *) (regs->pc + 2);
+ } else {
+ nextpc = regs->pc + 2;
+ finsn = insn;
+ }
+
+ if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */
+ struct task_struct *tsk = current;
+
+ save_fpu(tsk);
+ if ((tsk->thread.fpu.hard.fpscr & (1 << 17))) {
+ /* FPU error */
+ denormal_to_double (&tsk->thread.fpu.hard,
+ (finsn >> 8) & 0xf);
+ tsk->thread.fpu.hard.fpscr &=
+ ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK);
+ grab_fpu();
+ restore_fpu(tsk);
+ tsk->flags |= PF_USEDFPU;
+ } else {
+ tsk->thread.trap_no = 11;
+ tsk->thread.error_code = 0;
+ force_sig(SIGFPE, tsk);
+ }
+
+ regs->pc = nextpc;
+ return 1;
+ }
+
+ return 0;
+}
+
asmlinkage void
do_fpu_error(unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7,
struct pt_regs regs)
{
struct task_struct *tsk = current;
- regs.pc += 2;
+ if (ieee_fpe_handler (®s))
+ return;
- grab_fpu();
+ regs.pc += 2;
save_fpu(tsk);
tsk->thread.trap_no = 11;
tsk->thread.error_code = 0;
@@ -181,102 +296,12 @@
{
struct task_struct *tsk = current;
- if (!user_mode(®s)) {
- if (tsk != &init_task) {
- unlazy_fpu(tsk);
- }
- tsk = &init_task;
- if (tsk->flags & PF_USEDFPU) {
- /*
- * This weird situation can be occurred.
- *
- * There's race condition in __cli:
- *
- * (1) SR --> register
- * (2) Set IMASK of register
- * (3) SR <-- register
- *
- * Between (1) and (2), or (2) and (3) getting
- * interrupt, and interrupt handler (or
- * softirq) may use FPU.
- *
- * Then, SR.FD is overwritten by (3).
- *
- * This results init_task.PF_USEDFPU is on,
- * with SR.FD == 1.
- *
- */
- release_fpu();
- return;
- }
- }
-
grab_fpu();
- if (tsk->used_math) {
- /* Using the FPU again. */
- restore_fpu(tsk);
- } else {
- /* First time FPU user. */
- fpu_init();
- tsk->used_math = 1;
- }
- tsk->flags |= PF_USEDFPU;
- release_fpu();
-}
-
-/*
- * Change current FD flag to set FD flag back to exception
- */
-asmlinkage void
-fpu_prepare_fd(unsigned long sr, unsigned long r5, unsigned long r6,
- unsigned long r7, struct pt_regs regs)
-{
- __cli();
if (!user_mode(®s)) {
- if (init_task.flags & PF_USEDFPU)
- grab_fpu();
- else {
- if (!(sr & SR_FD)) {
- BUG();
- release_fpu();
- }
- }
+ printk(KERN_ERR "BUG: FPU is used in kernel mode.\n");
return;
}
- if (sr & SR_FD) { /* Kernel doesn't grab FPU */
- if (current->flags & PF_USEDFPU)
- grab_fpu();
- else {
- if (init_task.flags & PF_USEDFPU) {
- /*
- * This weird situation can be occurred.
- * See the comment in do_fpu_state_restore.
- */
- grab_fpu();
- save_fpu(&init_task);
- }
- }
- } else {
- if (init_task.flags & PF_USEDFPU)
- save_fpu(&init_task);
- else {
- BUG();
- release_fpu();
- }
- }
-}
-
-/* Short cut for the FPU exception */
-asmlinkage void
-enable_fpu_in_danger(void)
-{
- struct task_struct *tsk = current;
-
- if (tsk != &init_task)
- unlazy_fpu(tsk);
-
- tsk = &init_task;
if (tsk->used_math) {
/* Using the FPU again. */
restore_fpu(tsk);
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/hd64465_gpio.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/hd64465_gpio.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/hd64465_gpio.c Wed Jun 27 23:55:29 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/hd64465_gpio.c Mon Oct 15 22:44:48 2001
@@ -1,5 +1,5 @@
/*
- * $Id: hd64465_gpio.c,v 1.2 2001/05/24 00:13:47 gniibe Exp $
+ * $Id: hd64465_gpio.c,v 1.1.1.1 2001/10/15 20:44:48 mrbrown Exp $
* by Greg Banks
* (c) 2000 PocketPenguins Inc
*
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/head.S /usr/src/sh/7751/cvs/linux/arch/sh/kernel/head.S
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/head.S Mon Jan 29 04:56:00 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/head.S Wed May 29 13:31:15 2002
@@ -1,4 +1,4 @@
-/* $Id: head.S,v 1.17 2000/03/06 12:44:24 gniibe Exp $
+/* $Id: head.S,v 1.1.1.1.2.1 2002/01/25 00:51:42 gniibe Exp $
*
* arch/sh/kernel/head.S
*
@@ -50,12 +50,6 @@
sub r1, r0 !
ldc r0, r7_bank ! ... and init_task
!
-#if defined(__SH4__)
- ! Initialize fpu
- mov.l 7f, r0
- jsr @r0
- nop
-#endif
! Enable cache
mov.l 6f, r0
jsr @r0
@@ -74,12 +68,9 @@
nop
.balign 4
-1: .long 0x400000F0 ! MD=1, RB=0, BL=0, FD=0, IMASK=0xF
+1: .long 0x400080F0 ! MD=1, RB=0, BL=0, FD=1, IMASK=0xF
2: .long SYMBOL_NAME(stack)
3: .long SYMBOL_NAME(__bss_start)
4: .long SYMBOL_NAME(_end)
5: .long SYMBOL_NAME(start_kernel)
6: .long SYMBOL_NAME(cache_init)
-#if defined(__SH4__)
-7: .long SYMBOL_NAME(fpu_init)
-#endif
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/io_dc.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/io_dc.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/io_dc.c Wed Jun 27 23:55:29 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/io_dc.c Mon Oct 15 22:44:48 2001
@@ -1,5 +1,5 @@
/*
- * $Id: io_dc.c,v 1.2 2001/05/24 00:13:47 gniibe Exp $
+ * $Id: io_dc.c,v 1.1.1.1 2001/10/15 20:44:48 mrbrown Exp $
* I/O routines for SEGA Dreamcast
*/
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/io_flexbox.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/io_flexbox.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/io_flexbox.c Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/io_flexbox.c Wed May 29 13:25:03 2002
@@ -0,0 +1,181 @@
+/*
+ *
+ * linux/arch/sh/kernel/io_flexbox.c
+ *
+ * Copyright (C) 2000 Niibe Yutaka
+ *
+ * Generic I/O routine. These can be used where a machine specific version
+ * is not required.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ */
+
+#include
+#include
+#include
+#include
+
+#define PORT2ADDR(x) (x)
+
+unsigned long flexbox_io_base;
+
+static inline void delay(void)
+{
+ ctrl_inw(0xa0000000);
+}
+
+unsigned char flexbox_inb(unsigned long port)
+{
+ return *(volatile unsigned char*)PORT2ADDR(port);
+}
+
+unsigned short flexbox_inw(unsigned long port)
+{
+ return *(volatile unsigned short*)PORT2ADDR(port);
+}
+
+unsigned int flexbox_inl(unsigned long port)
+{
+ return *(volatile unsigned long*)PORT2ADDR(port);
+}
+
+unsigned char flexbox_inb_p(unsigned long port)
+{
+ unsigned long v = *(volatile unsigned char*)PORT2ADDR(port);
+
+ delay();
+ return v;
+}
+
+unsigned short flexbox_inw_p(unsigned long port)
+{
+ unsigned long v = *(volatile unsigned short*)PORT2ADDR(port);
+
+ delay();
+ return v;
+}
+
+unsigned int flexbox_inl_p(unsigned long port)
+{
+ unsigned long v = *(volatile unsigned long*)PORT2ADDR(port);
+
+ delay();
+ return v;
+}
+
+void flexbox_insb(unsigned long port, void *buffer, unsigned long count)
+{
+ unsigned char *buf=buffer;
+ while(count--) *buf++=inb(port);
+}
+
+void flexbox_insw(unsigned long port, void *buffer, unsigned long count)
+{
+ unsigned short *buf=buffer;
+ while(count--) *buf++=inw(port);
+}
+
+void flexbox_insl(unsigned long port, void *buffer, unsigned long count)
+{
+ unsigned long *buf=buffer;
+ while(count--) *buf++=inl(port);
+}
+
+void flexbox_outb(unsigned char b, unsigned long port)
+{
+ *(volatile unsigned char*)PORT2ADDR(port) = b;
+}
+
+void flexbox_outw(unsigned short b, unsigned long port)
+{
+ *(volatile unsigned short*)PORT2ADDR(port) = b;
+}
+
+void flexbox_outl(unsigned int b, unsigned long port)
+{
+ *(volatile unsigned long*)PORT2ADDR(port) = b;
+}
+
+void flexbox_outb_p(unsigned char b, unsigned long port)
+{
+ *(volatile unsigned char*)PORT2ADDR(port) = b;
+ delay();
+}
+
+void flexbox_outw_p(unsigned short b, unsigned long port)
+{
+ *(volatile unsigned short*)PORT2ADDR(port) = b;
+ delay();
+}
+
+void flexbox_outl_p(unsigned int b, unsigned long port)
+{
+ *(volatile unsigned long*)PORT2ADDR(port) = b;
+ delay();
+}
+
+void flexbox_outsb(unsigned long port, const void *buffer, unsigned long count)
+{
+ const unsigned char *buf=buffer;
+ while(count--) outb(*buf++, port);
+}
+
+void flexbox_outsw(unsigned long port, const void *buffer, unsigned long count)
+{
+ const unsigned short *buf=buffer;
+ while(count--) outw(*buf++, port);
+}
+
+void flexbox_outsl(unsigned long port, const void *buffer, unsigned long count)
+{
+ const unsigned long *buf=buffer;
+ while(count--) outl(*buf++, port);
+}
+
+unsigned char flexbox_readb(unsigned long addr)
+{
+ return *(volatile unsigned char*)addr;
+}
+
+unsigned short flexbox_readw(unsigned long addr)
+{
+ return *(volatile unsigned short*)addr;
+}
+
+unsigned int flexbox_readl(unsigned long addr)
+{
+ return *(volatile unsigned long*)addr;
+}
+
+void flexbox_writeb(unsigned char b, unsigned long addr)
+{
+ *(volatile unsigned char*)addr = b;
+}
+
+void flexbox_writew(unsigned short b, unsigned long addr)
+{
+ *(volatile unsigned short*)addr = b;
+}
+
+void flexbox_writel(unsigned int b, unsigned long addr)
+{
+ *(volatile unsigned long*)addr = b;
+}
+
+void * flexbox_ioremap(unsigned long offset, unsigned long size)
+{
+ return (void *) (offset);
+}
+
+void flexbox_iounmap(void *addr)
+{
+}
+
+unsigned long flexbox_isa_port2addr(unsigned long offset)
+{
+ return offset + flexbox_io_base;
+}
+
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/io_generic.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/io_generic.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/io_generic.c Mon Oct 15 22:36:48 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/io_generic.c Wed May 29 01:37:38 2002
@@ -1,4 +1,4 @@
-/* $Id: io_generic.c,v 1.12 2000/11/14 16:45:11 sugioka Exp $
+/* $Id: io_generic.c,v 1.1.1.1 2001/10/15 20:44:48 mrbrown Exp $
*
* linux/arch/sh/kernel/io_generic.c
*
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/io_hd64461.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/io_hd64461.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/io_hd64461.c Mon Oct 15 22:36:48 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/io_hd64461.c Mon Oct 15 22:44:48 2001
@@ -1,5 +1,5 @@
/*
- * $Id: io_hd64461.c,v 1.6 2000/11/16 23:28:44 yaegashi Exp $
+ * $Id: io_hd64461.c,v 1.1.1.1 2001/10/15 20:44:48 mrbrown Exp $
* Copyright (C) 2000 YAEGASHI Takeshi
* Typical I/O routines for HD64461 system.
*/
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/io_hd64465.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/io_hd64465.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/io_hd64465.c Wed Jun 27 23:55:29 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/io_hd64465.c Mon Oct 15 22:44:48 2001
@@ -1,5 +1,5 @@
/*
- * $Id: io_hd64465.c,v 1.7 2001/05/09 07:39:36 gniibe Exp $
+ * $Id: io_hd64465.c,v 1.1.1.1 2001/10/15 20:44:48 mrbrown Exp $
* by Greg Banks
* (c) 2000 PocketPenguins Inc
*
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/io_se.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/io_se.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/io_se.c Mon Oct 15 22:36:48 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/io_se.c Tue Feb 26 13:42:29 2002
@@ -1,4 +1,4 @@
-/* $Id: io_se.c,v 1.12 2001/08/11 01:23:28 jzs Exp $
+/* $Id: io_se.c,v 1.1.1.1.2.1 2002/02/26 11:42:29 gniibe Exp $
*
* linux/arch/sh/kernel/io_se.c
*
@@ -22,6 +22,7 @@
static inline void delay(void)
{
+ ctrl_inw(0xa0000000);
ctrl_inw(0xa0000000);
}
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/irq.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/irq.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/irq.c Sat Sep 8 22:29:09 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/irq.c Mon Oct 15 22:44:49 2001
@@ -1,4 +1,4 @@
-/* $Id: irq.c,v 1.21 2001/07/17 02:26:53 gniibe Exp $
+/* $Id: irq.c,v 1.1.1.1 2001/10/15 20:44:49 mrbrown Exp $
*
* linux/arch/sh/kernel/irq.c
*
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/irq_imask.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/irq_imask.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/irq_imask.c Sat Sep 8 22:29:09 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/irq_imask.c Mon Oct 15 22:44:49 2001
@@ -1,4 +1,4 @@
-/* $Id: irq_imask.c,v 1.13 2001/07/12 08:13:56 gniibe Exp $
+/* $Id: irq_imask.c,v 1.1.1.1 2001/10/15 20:44:49 mrbrown Exp $
*
* linux/arch/sh/kernel/irq_imask.c
*
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/irq_ipr.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/irq_ipr.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/irq_ipr.c Sat Sep 8 22:29:09 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/irq_ipr.c Wed May 29 13:32:18 2002
@@ -1,4 +1,4 @@
-/* $Id: irq_ipr.c,v 1.20 2001/07/15 23:26:56 gniibe Exp $
+/* $Id: irq_ipr.c,v 1.1.1.1 2001/10/15 20:44:49 mrbrown Exp $
*
* linux/arch/sh/kernel/irq_ipr.c
*
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/kgdb_jmp.S /usr/src/sh/7751/cvs/linux/arch/sh/kernel/kgdb_jmp.S
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/kgdb_jmp.S Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/kgdb_jmp.S Fri May 10 20:58:54 2002
@@ -0,0 +1,33 @@
+#include
+
+ENTRY(setjmp)
+ add #(9*4), r4
+ sts.l pr, @-r4
+ mov.l r15, @-r4
+ mov.l r14, @-r4
+ mov.l r13, @-r4
+ mov.l r12, @-r4
+ mov.l r11, @-r4
+ mov.l r10, @-r4
+ mov.l r9, @-r4
+ mov.l r8, @-r4
+ rts
+ mov #0, r0
+
+ENTRY(longjmp)
+ mov.l @r4+, r8
+ mov.l @r4+, r9
+ mov.l @r4+, r10
+ mov.l @r4+, r11
+ mov.l @r4+, r12
+ mov.l @r4+, r13
+ mov.l @r4+, r14
+ mov.l @r4+, r15
+ lds.l @r4+, pr
+ mov r5, r0
+ tst r0, r0
+ bf 1f
+ mov #1, r0 ! in case val==0
+1: rts
+ nop
+
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/kgdb_stub.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/kgdb_stub.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/kgdb_stub.c Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/kgdb_stub.c Fri May 10 20:58:54 2002
@@ -0,0 +1,1488 @@
+/*
+ * May be copied or modified under the terms of the GNU General Public
+ * License. See linux/COPYING for more information.
+ *
+ * Contains extracts from code by Glenn Engel, Jim Kingdon,
+ * David Grothe , Tigran Aivazian ,
+ * Amit S. Kale , William Gatliff ,
+ * Ben Lee, Steve Chamberlain and Benoit Miller .
+ *
+ * This version by Henry Bell
+ * Minor modifications by Jeremy Siegel
+ *
+ * Contains low-level support for remote debug using GDB.
+ *
+ * To enable debugger support, two things need to happen. A call to
+ * set_debug_traps() is necessary in order to allow any breakpoints
+ * or error conditions to be properly intercepted and reported to gdb.
+ * A breakpoint also needs to be generated to begin communication. This
+ * is most easily accomplished by a call to breakpoint() which does
+ * a trapa if the initialisation phase has been successfully completed.
+ *
+ * In this case, set_debug_traps() is not used to "take over" exceptions;
+ * other kernel code is modified instead to enter the kgdb functions here
+ * when appropriate (see entry.S for breakpoint traps and NMI interrupts,
+ * see traps.c for kernel error exceptions).
+ *
+ * The following gdb commands are supported:
+ *
+ * Command Function Return value
+ *
+ * g return the value of the CPU registers hex data or ENN
+ * G set the value of the CPU registers OK or ENN
+ *
+ * mAA..AA,LLLL Read LLLL bytes at address AA..AA hex data or ENN
+ * MAA..AA,LLLL: Write LLLL bytes at address AA.AA OK or ENN
+ * XAA..AA,LLLL: Same, but data is binary (not hex) OK or ENN
+ *
+ * c Resume at current address SNN ( signal NN)
+ * cAA..AA Continue at address AA..AA SNN
+ * CNN; Resume at current address with signal SNN
+ * CNN;AA..AA Resume at address AA..AA with signal SNN
+ *
+ * s Step one instruction SNN
+ * sAA..AA Step one instruction from AA..AA SNN
+ * SNN; Step one instruction with signal SNN
+ * SNNAA..AA Step one instruction from AA..AA w/NN SNN
+ *
+ * k kill (Detach GDB)
+ *
+ * d Toggle debug flag
+ * D Detach GDB
+ *
+ * Hct Set thread t for operations, OK or ENN
+ * c = 'c' (step, cont), c = 'g' (other
+ * operations)
+ *
+ * qC Query current thread ID QCpid
+ * qfThreadInfo Get list of current threads (first) m
+ * qsThreadInfo " " " " " (subsequent)
+ * qOffsets Get section offsets Text=x;Data=y;Bss=z
+ *
+ * TXX Find if thread XX is alive OK or ENN
+ * ? What was the last sigval ? SNN (signal NN)
+ * O Output to GDB console
+ *
+ * Remote communication protocol.
+ *
+ * A debug packet whose contents are is encapsulated for
+ * transmission in the form:
+ *
+ * $ # CSUM1 CSUM2
+ *
+ * must be ASCII alphanumeric and cannot include characters
+ * '$' or '#'. If starts with two characters followed by
+ * ':', then the existing stubs interpret this as a sequence number.
+ *
+ * CSUM1 and CSUM2 are ascii hex representation of an 8-bit
+ * checksum of , the most significant nibble is sent first.
+ * the hex digits 0-9,a-f are used.
+ *
+ * Receiver responds with:
+ *
+ * + - if CSUM is correct and ready for next packet
+ * - - if CSUM is incorrect
+ *
+ * Responses can be run-length encoded to save space. A '*' means that
+ * the next character is an ASCII encoding giving a repeat count which
+ * stands for that many repititions of the character preceding the '*'.
+ * The encoding is n+29, yielding a printable character where n >=3
+ * (which is where RLE starts to win). Don't use an n > 126.
+ *
+ * So "0* " means the same as "0000".
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#ifdef CONFIG_SH_KGDB_CONSOLE
+#include
+#endif
+
+/* Function pointers for linkage */
+kgdb_debug_hook_t *kgdb_debug_hook;
+kgdb_bus_error_hook_t *kgdb_bus_err_hook;
+
+int (*kgdb_getchar)(void);
+void (*kgdb_putchar)(int);
+
+static void put_debug_char(int c)
+{
+ if (!kgdb_putchar)
+ return;
+ (*kgdb_putchar)(c);
+}
+static int get_debug_char(void)
+{
+ if (!kgdb_getchar)
+ return -1;
+ return (*kgdb_getchar)();
+}
+
+/* Num chars in in/out bound buffers, register packets need NUMREGBYTES * 2 */
+#define BUFMAX 1024
+#define NUMREGBYTES (MAXREG*4)
+#define OUTBUFMAX (NUMREGBYTES*2+512)
+
+enum regs {
+ R0 = 0, R1, R2, R3, R4, R5, R6, R7,
+ R8, R9, R10, R11, R12, R13, R14, R15,
+ PC, PR, GBR, VBR, MACH, MACL, SR,
+ /* */
+ MAXREG
+};
+
+static unsigned int registers[MAXREG];
+struct kgdb_regs trap_registers;
+
+char kgdb_in_gdb_mode;
+char in_nmi; /* Set during NMI to prevent reentry */
+int kgdb_nofault; /* Boolean to ignore bus errs (i.e. in GDB) */
+int kgdb_enabled = 1; /* Default to enabled, cmdline can disable */
+int kgdb_halt;
+
+/* Exposed for user access */
+struct task_struct *kgdb_current;
+unsigned int kgdb_g_imask;
+int kgdb_trapa_val;
+int kgdb_excode;
+struct pt_regs *kgdb_tregs;
+
+/* Default values for SCI (can override via kernel args in setup.c) */
+#ifndef CONFIG_KGDB_DEFPORT
+#define CONFIG_KGDB_DEFPORT 1
+#endif
+
+#ifndef CONFIG_KGDB_DEFBAUD
+#define CONFIG_KGDB_DEFBAUD 115200
+#endif
+
+#if defined(CONFIG_KGDB_DEFPARITY_E)
+#define CONFIG_KGDB_DEFPARITY 'E'
+#elif defined(CONFIG_KGDB_DEFPARITY_O)
+#define CONFIG_KGDB_DEFPARITY 'O'
+#else /* CONFIG_KGDB_DEFPARITY_N */
+#define CONFIG_KGDB_DEFPARITY 'N'
+#endif
+
+#ifdef CONFIG_KGDB_DEFBITS_7
+#define CONFIG_KGDB_DEFBITS '7'
+#else /* CONFIG_KGDB_DEFBITS_8 */
+#define CONFIG_KGDB_DEFBITS '8'
+#endif
+
+/* SCI/UART settings, used in kgdb_serial_setup() */
+int (*kgdb_serial_setup)(void) = kgdb_sci_setup;
+int kgdb_portnum = CONFIG_KGDB_DEFPORT;
+int kgdb_baud = CONFIG_KGDB_DEFBAUD;
+char kgdb_parity = CONFIG_KGDB_DEFPARITY;
+char kgdb_bits = CONFIG_KGDB_DEFBITS;
+int kgdb_cflag;
+
+/* Jump buffer for setjmp/longjmp */
+static jmp_buf rem_com_env;
+
+/* TRA differs sh3/4 */
+#if defined(__sh3__)
+#define TRA 0xffffffd0
+#elif defined(__SH4__)
+#define TRA 0xff000020
+#endif
+
+/* Macros for single step instruction identification */
+#define OPCODE_BT(op) (((op) & 0xff00) == 0x8900)
+#define OPCODE_BF(op) (((op) & 0xff00) == 0x8b00)
+#define OPCODE_BTF_DISP(op) (((op) & 0x80) ? (((op) | 0xffffff80) << 1) : \
+ (((op) & 0x7f ) << 1))
+#define OPCODE_BFS(op) (((op) & 0xff00) == 0x8f00)
+#define OPCODE_BTS(op) (((op) & 0xff00) == 0x8d00)
+#define OPCODE_BRA(op) (((op) & 0xf000) == 0xa000)
+#define OPCODE_BRA_DISP(op) (((op) & 0x800) ? (((op) | 0xfffff800) << 1) : \
+ (((op) & 0x7ff) << 1))
+#define OPCODE_BRAF(op) (((op) & 0xf0ff) == 0x0023)
+#define OPCODE_BRAF_REG(op) (((op) & 0x0f00) >> 8)
+#define OPCODE_BSR(op) (((op) & 0xf000) == 0xb000)
+#define OPCODE_BSR_DISP(op) (((op) & 0x800) ? (((op) | 0xfffff800) << 1) : \
+ (((op) & 0x7ff) << 1))
+#define OPCODE_BSRF(op) (((op) & 0xf0ff) == 0x0003)
+#define OPCODE_BSRF_REG(op) (((op) >> 8) & 0xf)
+#define OPCODE_JMP(op) (((op) & 0xf0ff) == 0x402b)
+#define OPCODE_JMP_REG(op) (((op) >> 8) & 0xf)
+#define OPCODE_JSR(op) (((op) & 0xf0ff) == 0x400b)
+#define OPCODE_JSR_REG(op) (((op) >> 8) & 0xf)
+#define OPCODE_RTS(op) ((op) == 0xb)
+#define OPCODE_RTE(op) ((op) == 0x2b)
+
+#define SR_T_BIT_MASK 0x1
+#define STEP_OPCODE 0xc320
+#define BIOS_CALL_TRAP 0x3f
+
+/* Exception codes as per SH-4 core manual */
+#define ADDRESS_ERROR_LOAD_VEC 7
+#define ADDRESS_ERROR_STORE_VEC 8
+#define TRAP_VEC 11
+#define INVALID_INSN_VEC 12
+#define INVALID_SLOT_VEC 13
+#define NMI_VEC 14
+#define USER_BREAK_VEC 15
+#define SERIAL_BREAK_VEC 58
+
+/* Misc static */
+static int stepped_address;
+static short stepped_opcode;
+static const char hexchars[] = "0123456789abcdef";
+static char in_buffer[BUFMAX];
+static char out_buffer[OUTBUFMAX];
+
+static void kgdb_to_gdb(const char *s);
+
+#ifdef CONFIG_KGDB_THREAD
+static struct task_struct *trapped_thread;
+static struct task_struct *current_thread;
+typedef unsigned char threadref[8];
+#define BUF_THREAD_ID_SIZE 16
+#endif
+
+/* Return addr as a real volatile address */
+static inline unsigned int ctrl_inl(const unsigned long addr)
+{
+ return *(volatile unsigned long *) addr;
+}
+
+/* Correctly set *addr using volatile */
+static inline void ctrl_outl(const unsigned int b, unsigned long addr)
+{
+ *(volatile unsigned long *) addr = b;
+}
+
+/* Get high hex bits */
+static char highhex(const int x)
+{
+ return hexchars[(x >> 4) & 0xf];
+}
+
+/* Get low hex bits */
+static char lowhex(const int x)
+{
+ return hexchars[x & 0xf];
+}
+
+/* Convert ch to hex */
+static int hex(const char ch)
+{
+ if ((ch >= 'a') && (ch <= 'f'))
+ return (ch - 'a' + 10);
+ if ((ch >= '0') && (ch <= '9'))
+ return (ch - '0');
+ if ((ch >= 'A') && (ch <= 'F'))
+ return (ch - 'A' + 10);
+ return (-1);
+}
+
+/* Convert the memory pointed to by mem into hex, placing result in buf.
+ Returns a pointer to the last char put in buf (null) */
+static char *mem_to_hex(const char *mem, char *buf, const int count)
+{
+ int i;
+ int ch;
+ unsigned short s_val;
+ unsigned long l_val;
+
+ /* Check for 16 or 32 */
+ if (count == 2 && ((long) mem & 1) == 0) {
+ s_val = *(unsigned short *) mem;
+ mem = (char *) &s_val;
+ } else if (count == 4 && ((long) mem & 3) == 0) {
+ l_val = *(unsigned long *) mem;
+ mem = (char *) &l_val;
+ }
+ for (i = 0; i < count; i++) {
+ ch = *mem++;
+ *buf++ = highhex(ch);
+ *buf++ = lowhex(ch);
+ }
+ *buf = 0;
+ return (buf);
+}
+
+/* Convert the hex array pointed to by buf into binary, to be placed in mem.
+ Return a pointer to the character after the last byte written */
+static char *hex_to_mem(const char *buf, char *mem, const int count)
+{
+ int i;
+ unsigned char ch;
+
+ for (i = 0; i < count; i++) {
+ ch = hex(*buf++) << 4;
+ ch = ch + hex(*buf++);
+ *mem++ = ch;
+ }
+ return (mem);
+}
+
+/* While finding valid hex chars, convert to an integer, then return it */
+static int hex_to_int(char **ptr, int *int_value)
+{
+ int num_chars = 0;
+ int hex_value;
+
+ *int_value = 0;
+
+ while (**ptr) {
+ hex_value = hex(**ptr);
+ if (hex_value >= 0) {
+ *int_value = (*int_value << 4) | hex_value;
+ num_chars++;
+ } else
+ break;
+ (*ptr)++;
+ }
+ return num_chars;
+}
+
+/* Copy the binary array pointed to by buf into mem. Fix $, #,
+ and 0x7d escaped with 0x7d. Return a pointer to the character
+ after the last byte written. */
+static char *ebin_to_mem(const char *buf, char *mem, int count)
+{
+ for (; count > 0; count--, buf++) {
+ if (*buf == 0x7d)
+ *mem++ = *(++buf) ^ 0x20;
+ else
+ *mem++ = *buf;
+ }
+ return mem;
+}
+
+/* Pack a hex byte */
+static char *pack_hex_byte(char *pkt, int byte)
+{
+ *pkt++ = hexchars[(byte >> 4) & 0xf];
+ *pkt++ = hexchars[(byte & 0xf)];
+ return pkt;
+}
+
+#ifdef CONFIG_KGDB_THREAD
+
+/* Pack a thread ID */
+static char *pack_threadid(char *pkt, threadref * id)
+{
+ char *limit;
+ unsigned char *altid;
+
+ altid = (unsigned char *) id;
+
+ limit = pkt + BUF_THREAD_ID_SIZE;
+ while (pkt < limit)
+ pkt = pack_hex_byte(pkt, *altid++);
+ return pkt;
+}
+
+/* Convert an integer into our threadref */
+static void int_to_threadref(threadref * id, const int value)
+{
+ unsigned char *scan = (unsigned char *) id;
+ int i = 4;
+
+ while (i--)
+ *scan++ = 0;
+
+ *scan++ = (value >> 24) & 0xff;
+ *scan++ = (value >> 16) & 0xff;
+ *scan++ = (value >> 8) & 0xff;
+ *scan++ = (value & 0xff);
+}
+
+/* Return a task structure ptr for a particular pid */
+static struct task_struct *get_thread(int pid)
+{
+ struct task_struct *thread;
+
+ /* Use PID_MAX w/gdb for pid 0 */
+ if (pid == PID_MAX) pid = 0;
+
+ /* First check via PID */
+ thread = find_task_by_pid(pid);
+
+ if (thread)
+ return thread;
+
+ /* Start at the start */
+ thread = init_tasks[0];
+
+ /* Walk along the linked list of tasks */
+ do {
+ if (thread->pid == pid)
+ return thread;
+ thread = thread->next_task;
+ } while (thread != init_tasks[0]);
+
+ return NULL;
+}
+
+#endif /* CONFIG_KGDB_THREAD */
+
+/* Scan for the start char '$', read the packet and check the checksum */
+static void get_packet(char *buffer, int buflen)
+{
+ unsigned char checksum;
+ unsigned char xmitcsum;
+ int i;
+ int count;
+ char ch;
+
+ do {
+ /* Ignore everything until the start character */
+ while ((ch = get_debug_char()) != '$');
+
+ checksum = 0;
+ xmitcsum = -1;
+ count = 0;
+
+ /* Now, read until a # or end of buffer is found */
+ while (count < (buflen - 1)) {
+ ch = get_debug_char();
+
+ if (ch == '#')
+ break;
+
+ checksum = checksum + ch;
+ buffer[count] = ch;
+ count = count + 1;
+ }
+
+ buffer[count] = 0;
+
+ /* Continue to read checksum following # */
+ if (ch == '#') {
+ xmitcsum = hex(get_debug_char()) << 4;
+ xmitcsum += hex(get_debug_char());
+
+ /* Checksum */
+ if (checksum != xmitcsum)
+ put_debug_char('-'); /* Failed checksum */
+ else {
+ /* Ack successful transfer */
+ put_debug_char('+');
+
+ /* If a sequence char is present, reply
+ the sequence ID */
+ if (buffer[2] == ':') {
+ put_debug_char(buffer[0]);
+ put_debug_char(buffer[1]);
+
+ /* Remove sequence chars from buffer */
+ count = strlen(buffer);
+ for (i = 3; i <= count; i++)
+ buffer[i - 3] = buffer[i];
+ }
+ }
+ }
+ }
+ while (checksum != xmitcsum); /* Keep trying while we fail */
+}
+
+/* Send the packet in the buffer with run-length encoding */
+static void put_packet(char *buffer)
+{
+ int checksum;
+ char *src;
+ int runlen;
+ int encode;
+
+ do {
+ src = buffer;
+ put_debug_char('$');
+ checksum = 0;
+
+ /* Continue while we still have chars left */
+ while (*src) {
+ /* Check for runs up to 99 chars long */
+ for (runlen = 1; runlen < 99; runlen++) {
+ if (src[0] != src[runlen])
+ break;
+ }
+
+ if (runlen > 3) {
+ /* Got a useful amount, send encoding */
+ encode = runlen + ' ' - 4;
+ put_debug_char(*src); checksum += *src;
+ put_debug_char('*'); checksum += '*';
+ put_debug_char(encode); checksum += encode;
+ src += runlen;
+ } else {
+ /* Otherwise just send the current char */
+ put_debug_char(*src); checksum += *src;
+ src += 1;
+ }
+ }
+
+ /* '#' Separator, put high and low components of checksum */
+ put_debug_char('#');
+ put_debug_char(highhex(checksum));
+ put_debug_char(lowhex(checksum));
+ }
+ while ((get_debug_char()) != '+'); /* While no ack */
+}
+
+/* A bus error has occurred - perform a longjmp to return execution and
+ allow handling of the error */
+static void kgdb_handle_bus_error(void)
+{
+ longjmp(rem_com_env, 1);
+}
+
+/* Translate SH-3/4 exception numbers to unix-like signal values */
+static int compute_signal(const int excep_code)
+{
+ int sigval;
+
+ switch (excep_code) {
+
+ case INVALID_INSN_VEC:
+ case INVALID_SLOT_VEC:
+ sigval = SIGILL;
+ break;
+ case ADDRESS_ERROR_LOAD_VEC:
+ case ADDRESS_ERROR_STORE_VEC:
+ sigval = SIGSEGV;
+ break;
+
+ case SERIAL_BREAK_VEC:
+ case NMI_VEC:
+ sigval = SIGINT;
+ break;
+
+ case USER_BREAK_VEC:
+ case TRAP_VEC:
+ sigval = SIGTRAP;
+ break;
+
+ default:
+ sigval = SIGBUS; /* "software generated" */
+ break;
+ }
+
+ return (sigval);
+}
+
+/* Make a local copy of the registers passed into the handler (bletch) */
+static void kgdb_regs_to_gdb_regs(const struct kgdb_regs *regs,
+ int *gdb_regs)
+{
+ gdb_regs[R0] = regs->regs[R0];
+ gdb_regs[R1] = regs->regs[R1];
+ gdb_regs[R2] = regs->regs[R2];
+ gdb_regs[R3] = regs->regs[R3];
+ gdb_regs[R4] = regs->regs[R4];
+ gdb_regs[R5] = regs->regs[R5];
+ gdb_regs[R6] = regs->regs[R6];
+ gdb_regs[R7] = regs->regs[R7];
+ gdb_regs[R8] = regs->regs[R8];
+ gdb_regs[R9] = regs->regs[R9];
+ gdb_regs[R10] = regs->regs[R10];
+ gdb_regs[R11] = regs->regs[R11];
+ gdb_regs[R12] = regs->regs[R12];
+ gdb_regs[R13] = regs->regs[R13];
+ gdb_regs[R14] = regs->regs[R14];
+ gdb_regs[R15] = regs->regs[R15];
+ gdb_regs[PC] = regs->pc;
+ gdb_regs[PR] = regs->pr;
+ gdb_regs[GBR] = regs->gbr;
+ gdb_regs[MACH] = regs->mach;
+ gdb_regs[MACL] = regs->macl;
+ gdb_regs[SR] = regs->sr;
+ gdb_regs[VBR] = regs->vbr;
+}
+
+/* Copy local gdb registers back to kgdb regs, for later copy to kernel */
+static void gdb_regs_to_kgdb_regs(const int *gdb_regs,
+ struct kgdb_regs *regs)
+{
+ regs->regs[R0] = gdb_regs[R0];
+ regs->regs[R1] = gdb_regs[R1];
+ regs->regs[R2] = gdb_regs[R2];
+ regs->regs[R3] = gdb_regs[R3];
+ regs->regs[R4] = gdb_regs[R4];
+ regs->regs[R5] = gdb_regs[R5];
+ regs->regs[R6] = gdb_regs[R6];
+ regs->regs[R7] = gdb_regs[R7];
+ regs->regs[R8] = gdb_regs[R8];
+ regs->regs[R9] = gdb_regs[R9];
+ regs->regs[R10] = gdb_regs[R10];
+ regs->regs[R11] = gdb_regs[R11];
+ regs->regs[R12] = gdb_regs[R12];
+ regs->regs[R13] = gdb_regs[R13];
+ regs->regs[R14] = gdb_regs[R14];
+ regs->regs[R15] = gdb_regs[R15];
+ regs->pc = gdb_regs[PC];
+ regs->pr = gdb_regs[PR];
+ regs->gbr = gdb_regs[GBR];
+ regs->mach = gdb_regs[MACH];
+ regs->macl = gdb_regs[MACL];
+ regs->sr = gdb_regs[SR];
+ regs->vbr = gdb_regs[VBR];
+}
+
+#ifdef CONFIG_KGDB_THREAD
+/* Make a local copy of registers from the specified thread */
+asmlinkage void ret_from_fork(void);
+static void thread_regs_to_gdb_regs(const struct task_struct *thread,
+ int *gdb_regs)
+{
+ int regno;
+ int *tregs;
+
+ /* Initialize to zero */
+ for (regno = 0; regno < MAXREG; regno++)
+ gdb_regs[regno] = 0;
+
+ /* Just making sure... */
+ if (thread == NULL)
+ return;
+
+ /* A new fork has pt_regs on the stack from a fork() call */
+ if (thread->thread.pc == (unsigned long)ret_from_fork) {
+
+ int vbr_val;
+ struct pt_regs *kregs;
+ kregs = (struct pt_regs*)thread->thread.sp;
+
+ gdb_regs[R0] = kregs->regs[R0];
+ gdb_regs[R1] = kregs->regs[R1];
+ gdb_regs[R2] = kregs->regs[R2];
+ gdb_regs[R3] = kregs->regs[R3];
+ gdb_regs[R4] = kregs->regs[R4];
+ gdb_regs[R5] = kregs->regs[R5];
+ gdb_regs[R6] = kregs->regs[R6];
+ gdb_regs[R7] = kregs->regs[R7];
+ gdb_regs[R8] = kregs->regs[R8];
+ gdb_regs[R9] = kregs->regs[R9];
+ gdb_regs[R10] = kregs->regs[R10];
+ gdb_regs[R11] = kregs->regs[R11];
+ gdb_regs[R12] = kregs->regs[R12];
+ gdb_regs[R13] = kregs->regs[R13];
+ gdb_regs[R14] = kregs->regs[R14];
+ gdb_regs[R15] = kregs->regs[R15];
+ gdb_regs[PC] = kregs->pc;
+ gdb_regs[PR] = kregs->pr;
+ gdb_regs[GBR] = kregs->gbr;
+ gdb_regs[MACH] = kregs->mach;
+ gdb_regs[MACL] = kregs->macl;
+ gdb_regs[SR] = kregs->sr;
+
+ asm("stc vbr, %0":"=r"(vbr_val));
+ gdb_regs[VBR] = vbr_val;
+ return;
+ }
+
+ /* Otherwise, we have only some registers from switch_to() */
+ tregs = (int *)thread->thread.sp;
+ gdb_regs[R15] = (int)tregs;
+ gdb_regs[R14] = *tregs++;
+ gdb_regs[R13] = *tregs++;
+ gdb_regs[R12] = *tregs++;
+ gdb_regs[R11] = *tregs++;
+ gdb_regs[R10] = *tregs++;
+ gdb_regs[R9] = *tregs++;
+ gdb_regs[R8] = *tregs++;
+ gdb_regs[PR] = *tregs++;
+ gdb_regs[GBR] = *tregs++;
+ gdb_regs[PC] = thread->thread.pc;
+}
+#endif /* CONFIG_KGDB_THREAD */
+
+/* Calculate the new address for after a step */
+static short *get_step_address(void)
+{
+ short op = *(short *) trap_registers.pc;
+ long addr;
+
+ /* BT */
+ if (OPCODE_BT(op)) {
+ if (trap_registers.sr & SR_T_BIT_MASK)
+ addr = trap_registers.pc + 4 + OPCODE_BTF_DISP(op);
+ else
+ addr = trap_registers.pc + 2;
+ }
+
+ /* BTS */
+ else if (OPCODE_BTS(op)) {
+ if (trap_registers.sr & SR_T_BIT_MASK)
+ addr = trap_registers.pc + 4 + OPCODE_BTF_DISP(op);
+ else
+ addr = trap_registers.pc + 4; /* Not in delay slot */
+ }
+
+ /* BF */
+ else if (OPCODE_BF(op)) {
+ if (!(trap_registers.sr & SR_T_BIT_MASK))
+ addr = trap_registers.pc + 4 + OPCODE_BTF_DISP(op);
+ else
+ addr = trap_registers.pc + 2;
+ }
+
+ /* BFS */
+ else if (OPCODE_BFS(op)) {
+ if (!(trap_registers.sr & SR_T_BIT_MASK))
+ addr = trap_registers.pc + 4 + OPCODE_BTF_DISP(op);
+ else
+ addr = trap_registers.pc + 4; /* Not in delay slot */
+ }
+
+ /* BRA */
+ else if (OPCODE_BRA(op))
+ addr = trap_registers.pc + 4 + OPCODE_BRA_DISP(op);
+
+ /* BRAF */
+ else if (OPCODE_BRAF(op))
+ addr = trap_registers.pc + 4
+ + trap_registers.regs[OPCODE_BRAF_REG(op)];
+
+ /* BSR */
+ else if (OPCODE_BSR(op))
+ addr = trap_registers.pc + 4 + OPCODE_BSR_DISP(op);
+
+ /* BSRF */
+ else if (OPCODE_BSRF(op))
+ addr = trap_registers.pc + 4
+ + trap_registers.regs[OPCODE_BSRF_REG(op)];
+
+ /* JMP */
+ else if (OPCODE_JMP(op))
+ addr = trap_registers.regs[OPCODE_JMP_REG(op)];
+
+ /* JSR */
+ else if (OPCODE_JSR(op))
+ addr = trap_registers.regs[OPCODE_JSR_REG(op)];
+
+ /* RTS */
+ else if (OPCODE_RTS(op))
+ addr = trap_registers.pr;
+
+ /* RTE */
+ else if (OPCODE_RTE(op))
+ addr = trap_registers.regs[15];
+
+ /* Other */
+ else
+ addr = trap_registers.pc + 2;
+
+ flush_icache_range(addr, addr + 2);
+ return (short *) addr;
+}
+
+/* Set up a single-step. Replace the instruction immediately after the
+ current instruction (i.e. next in the expected flow of control) with a
+ trap instruction, so that returning will cause only a single instruction
+ to be executed. Note that this model is slightly broken for instructions
+ with delay slots (e.g. B[TF]S, BSR, BRA etc), where both the branch
+ and the instruction in the delay slot will be executed. */
+static void do_single_step(void)
+{
+ unsigned short *addr = 0;
+
+ /* Determine where the target instruction will send us to */
+ addr = get_step_address();
+ stepped_address = (int)addr;
+
+ /* Replace it */
+ stepped_opcode = *(short *)addr;
+ *addr = STEP_OPCODE;
+
+ /* Flush and return */
+ flush_icache_range((long) addr, (long) addr + 2);
+ return;
+}
+
+/* Undo a single step */
+static void undo_single_step(void)
+{
+ /* If we have stepped, put back the old instruction */
+ /* Use stepped_address in case we stopped elsewhere */
+ if (stepped_opcode != 0) {
+ *(short*)stepped_address = stepped_opcode;
+ flush_icache_range(stepped_address, stepped_address + 2);
+ }
+ stepped_opcode = 0;
+}
+
+/* Send a signal message */
+static void send_signal_msg(const int signum)
+{
+#ifndef CONFIG_KGDB_THREAD
+ out_buffer[0] = 'S';
+ out_buffer[1] = highhex(signum);
+ out_buffer[2] = lowhex(signum);
+ out_buffer[3] = 0;
+ put_packet(out_buffer);
+#else /* CONFIG_KGDB_THREAD */
+ int threadid;
+ threadref thref;
+ char *out = out_buffer;
+ const char *tstring = "thread";
+
+ *out++ = 'T';
+ *out++ = highhex(signum);
+ *out++ = lowhex(signum);
+
+ while (*tstring) {
+ *out++ = *tstring++;
+ }
+ *out++ = ':';
+
+ threadid = trapped_thread->pid;
+ if (threadid == 0) threadid = PID_MAX;
+ int_to_threadref(&thref, threadid);
+ pack_threadid(out, &thref);
+ out += BUF_THREAD_ID_SIZE;
+ *out++ = ';';
+
+ *out = 0;
+ put_packet(out_buffer);
+#endif /* CONFIG_KGDB_THREAD */
+}
+
+/* Reply that all was well */
+static void send_ok_msg(void)
+{
+ strcpy(out_buffer, "OK");
+ put_packet(out_buffer);
+}
+
+/* Reply that an error occurred */
+static void send_err_msg(void)
+{
+ strcpy(out_buffer, "E01");
+ put_packet(out_buffer);
+}
+
+/* Empty message indicates unrecognised command */
+static void send_empty_msg(void)
+{
+ put_packet("");
+}
+
+/* Read memory due to 'm' message */
+static void read_mem_msg(void)
+{
+ char *ptr;
+ int addr;
+ int length;
+
+ /* Jmp, disable bus error handler */
+ if (setjmp(rem_com_env) == 0) {
+
+ kgdb_nofault = 1;
+
+ /* Walk through, have m, */
+ ptr = &in_buffer[1];
+ if (hex_to_int(&ptr, &addr) && (*ptr++ == ','))
+ if (hex_to_int(&ptr, &length)) {
+ ptr = 0;
+ if (length * 2 > OUTBUFMAX)
+ length = OUTBUFMAX / 2;
+ mem_to_hex((char *) addr, out_buffer, length);
+ }
+ if (ptr)
+ send_err_msg();
+ else
+ put_packet(out_buffer);
+ } else
+ send_err_msg();
+
+ /* Restore bus error handler */
+ kgdb_nofault = 0;
+}
+
+/* Write memory due to 'M' or 'X' message */
+static void write_mem_msg(int binary)
+{
+ char *ptr;
+ int addr;
+ int length;
+
+ if (setjmp(rem_com_env) == 0) {
+
+ kgdb_nofault = 1;
+
+ /* Walk through, have M,: */
+ ptr = &in_buffer[1];
+ if (hex_to_int(&ptr, &addr) && (*ptr++ == ','))
+ if (hex_to_int(&ptr, &length) && (*ptr++ == ':')) {
+ if (binary)
+ ebin_to_mem(ptr, (char*)addr, length);
+ else
+ hex_to_mem(ptr, (char*)addr, length);
+ flush_icache_range(addr, addr + length);
+ ptr = 0;
+ send_ok_msg();
+ }
+ if (ptr)
+ send_err_msg();
+ } else
+ send_err_msg();
+
+ /* Restore bus error handler */
+ kgdb_nofault = 0;
+}
+
+/* Continue message */
+static void continue_msg(void)
+{
+ /* Try to read optional parameter, PC unchanged if none */
+ char *ptr = &in_buffer[1];
+ int addr;
+
+ if (hex_to_int(&ptr, &addr))
+ trap_registers.pc = addr;
+}
+
+/* Continue message with signal */
+static void continue_with_sig_msg(void)
+{
+ int signal;
+ char *ptr = &in_buffer[1];
+ int addr;
+
+ /* Report limitation */
+ kgdb_to_gdb("Cannot force signal in kgdb, continuing anyway.\n");
+
+ /* Signal */
+ hex_to_int(&ptr, &signal);
+ if (*ptr == ';')
+ ptr++;
+
+ /* Optional address */
+ if (hex_to_int(&ptr, &addr))
+ trap_registers.pc = addr;
+}
+
+/* Step message */
+static void step_msg(void)
+{
+ continue_msg();
+ do_single_step();
+}
+
+/* Step message with signal */
+static void step_with_sig_msg(void)
+{
+ continue_with_sig_msg();
+ do_single_step();
+}
+
+/* Send register contents */
+static void send_regs_msg(void)
+{
+#ifdef CONFIG_KGDB_THREAD
+ if (!current_thread)
+ kgdb_regs_to_gdb_regs(&trap_registers, registers);
+ else
+ thread_regs_to_gdb_regs(current_thread, registers);
+#else
+ kgdb_regs_to_gdb_regs(&trap_registers, registers);
+#endif
+
+ mem_to_hex((char *) registers, out_buffer, NUMREGBYTES);
+ put_packet(out_buffer);
+}
+
+/* Set register contents - currently can't set other thread's registers */
+static void set_regs_msg(void)
+{
+#ifdef CONFIG_KGDB_THREAD
+ if (!current_thread) {
+#endif
+ kgdb_regs_to_gdb_regs(&trap_registers, registers);
+ hex_to_mem(&in_buffer[1], (char *) registers, NUMREGBYTES);
+ gdb_regs_to_kgdb_regs(registers, &trap_registers);
+ send_ok_msg();
+#ifdef CONFIG_KGDB_THREAD
+ } else
+ send_err_msg();
+#endif
+}
+
+
+#ifdef CONFIG_KGDB_THREAD
+
+/* Set the status for a thread */
+void set_thread_msg(void)
+{
+ int threadid;
+ struct task_struct *thread = NULL;
+ char *ptr;
+
+ switch (in_buffer[1]) {
+
+ /* To select which thread for gG etc messages, i.e. supported */
+ case 'g':
+
+ ptr = &in_buffer[2];
+ hex_to_int(&ptr, &threadid);
+ thread = get_thread(threadid);
+
+ /* If we haven't found it */
+ if (!thread) {
+ send_err_msg();
+ break;
+ }
+
+ /* Set current_thread (or not) */
+ if (thread == trapped_thread)
+ current_thread = NULL;
+ else
+ current_thread = thread;
+ send_ok_msg();
+ break;
+
+ /* To select which thread for cCsS messages, i.e. unsupported */
+ case 'c':
+ send_ok_msg();
+ break;
+
+ default:
+ send_empty_msg();
+ break;
+ }
+}
+
+/* Is a thread alive? */
+static void thread_status_msg(void)
+{
+ char *ptr;
+ int threadid;
+ struct task_struct *thread = NULL;
+
+ ptr = &in_buffer[1];
+ hex_to_int(&ptr, &threadid);
+ thread = get_thread(threadid);
+ if (thread)
+ send_ok_msg();
+ else
+ send_err_msg();
+}
+/* Send the current thread ID */
+static void thread_id_msg(void)
+{
+ int threadid;
+ threadref thref;
+
+ out_buffer[0] = 'Q';
+ out_buffer[1] = 'C';
+
+ if (current_thread)
+ threadid = current_thread->pid;
+ else if (trapped_thread)
+ threadid = trapped_thread->pid;
+ else /* Impossible, but just in case! */
+ {
+ send_err_msg();
+ return;
+ }
+
+ /* Translate pid 0 to PID_MAX for gdb */
+ if (threadid == 0) threadid = PID_MAX;
+
+ int_to_threadref(&thref, threadid);
+ pack_threadid(out_buffer + 2, &thref);
+ out_buffer[2 + BUF_THREAD_ID_SIZE] = '\0';
+ put_packet(out_buffer);
+}
+
+/* Send thread info */
+static void thread_info_msg(void)
+{
+ struct task_struct *thread = NULL;
+ int threadid;
+ char *pos;
+ threadref thref;
+
+ /* Start with 'm' */
+ out_buffer[0] = 'm';
+ pos = &out_buffer[1];
+
+ /* For all possible thread IDs - this will overrun if > 44 threads! */
+ /* Start at 1 and include PID_MAX (since GDB won't use pid 0...) */
+ for (threadid = 1; threadid <= PID_MAX; threadid++) {
+
+ read_lock(&tasklist_lock);
+ thread = get_thread(threadid);
+ read_unlock(&tasklist_lock);
+
+ /* If it's a valid thread */
+ if (thread) {
+ int_to_threadref(&thref, threadid);
+ pack_threadid(pos, &thref);
+ pos += BUF_THREAD_ID_SIZE;
+ *pos++ = ',';
+ }
+ }
+ *--pos = 0; /* Lose final comma */
+ put_packet(out_buffer);
+
+}
+
+/* Return printable info for gdb's 'info threads' command */
+static void thread_extra_info_msg(void)
+{
+ int threadid;
+ struct task_struct *thread = NULL;
+ char buffer[20], *ptr;
+ int i;
+
+ /* Extract thread ID */
+ ptr = &in_buffer[17];
+ hex_to_int(&ptr, &threadid);
+ thread = get_thread(threadid);
+
+ /* If we don't recognise it, say so */
+ if (thread == NULL)
+ strcpy(buffer, "(unknown)");
+ else
+ strcpy(buffer, thread->comm);
+
+ /* Construct packet */
+ for (i = 0, ptr = out_buffer; buffer[i]; i++)
+ ptr = pack_hex_byte(ptr, buffer[i]);
+
+ if (thread->thread.pc == (unsigned long)ret_from_fork) {
+ strcpy(buffer, "");
+ for (i = 0; buffer[i]; i++)
+ ptr = pack_hex_byte(ptr, buffer[i]);
+ }
+
+ *ptr = '\0';
+ put_packet(out_buffer);
+}
+
+/* Handle all qFooBarBaz messages - have to use an if statement as
+ opposed to a switch because q messages can have > 1 char id. */
+static void query_msg(void)
+{
+ const char *q_start = &in_buffer[1];
+
+ /* qC = return current thread ID */
+ if (strncmp(q_start, "C", 1) == 0)
+ thread_id_msg();
+
+ /* qfThreadInfo = query all threads (first) */
+ else if (strncmp(q_start, "fThreadInfo", 11) == 0)
+ thread_info_msg();
+
+ /* qsThreadInfo = query all threads (subsequent). We know we have sent
+ them all after the qfThreadInfo message, so there are no to send */
+ else if (strncmp(q_start, "sThreadInfo", 11) == 0)
+ put_packet("l"); /* el = last */
+
+ /* qThreadExtraInfo = supply printable information per thread */
+ else if (strncmp(q_start, "ThreadExtraInfo", 15) == 0)
+ thread_extra_info_msg();
+
+ /* Unsupported - empty message as per spec */
+ else
+ send_empty_msg();
+}
+#endif /* CONFIG_KGDB_THREAD */
+
+/* The command loop, read and act on requests */
+static void kgdb_command_loop(const int excep_code, const int trapa_value)
+{
+ int sigval;
+
+ if (excep_code == NMI_VEC) {
+#ifndef CONFIG_KGDB_NMI
+ KGDB_PRINTK("Ignoring unexpected NMI?\n");
+ return;
+#else /* CONFIG_KGDB_NMI */
+ if (!kgdb_enabled) {
+ kgdb_enabled = 1;
+ kgdb_init();
+ }
+#endif /* CONFIG_KGDB_NMI */
+ }
+
+ /* Ignore if we're disabled */
+ if (!kgdb_enabled)
+ return;
+
+#ifdef CONFIG_KGDB_THREAD
+ /* Until GDB specifies a thread */
+ current_thread = NULL;
+ trapped_thread = current;
+#endif
+
+ /* Enter GDB mode (e.g. after detach) */
+ if (!kgdb_in_gdb_mode) {
+ /* Do serial setup, notify user, issue preemptive ack */
+ (void)kgdb_serial_setup();
+ KGDB_PRINTK("Waiting for GDB (on %s%d at %d baud)\n",
+ (kgdb_porttype ? kgdb_porttype->name : ""),
+ kgdb_portnum, kgdb_baud);
+ kgdb_in_gdb_mode = 1;
+ put_debug_char('+');
+ }
+
+ /* Reply to host that an exception has occurred */
+ sigval = compute_signal(excep_code);
+ send_signal_msg(sigval);
+
+ /* TRAP_VEC exception indicates a software trap inserted in place of
+ code by GDB so back up PC by one instruction, as this instruction
+ will later be replaced by its original one. Do NOT do this for
+ trap 0xff, since that indicates a compiled-in breakpoint which
+ will not be replaced (and we would retake the trap forever) */
+ if ((excep_code == TRAP_VEC) && (trapa_value != (0xff << 2))) {
+ trap_registers.pc -= 2;
+ }
+
+ /* Undo any stepping we may have done */
+ undo_single_step();
+
+ while (1) {
+
+ out_buffer[0] = 0;
+ get_packet(in_buffer, BUFMAX);
+
+ /* Examine first char of buffer to see what we need to do */
+ switch (in_buffer[0]) {
+
+ case '?': /* Send which signal we've received */
+ send_signal_msg(sigval);
+ break;
+
+ case 'g': /* Return the values of the CPU registers */
+ send_regs_msg();
+ break;
+
+ case 'G': /* Set the value of the CPU registers */
+ set_regs_msg();
+ break;
+
+ case 'm': /* Read LLLL bytes address AA..AA */
+ read_mem_msg();
+ break;
+
+ case 'M': /* Write LLLL bytes address AA..AA, ret OK */
+ write_mem_msg(0); /* 0 = data in hex */
+ break;
+
+ case 'X': /* Write LLLL bytes esc bin address AA..AA */
+ if (kgdb_bits == '8')
+ write_mem_msg(1); /* 1 = data in binary */
+ else
+ send_empty_msg();
+ break;
+
+ case 'C': /* Continue, signum included, we ignore it */
+ continue_with_sig_msg();
+ return;
+
+ case 'c': /* Continue at address AA..AA (optional) */
+ continue_msg();
+ return;
+
+ case 'S': /* Step, signum included, we ignore it */
+ step_with_sig_msg();
+ return;
+
+ case 's': /* Step one instruction from AA..AA */
+ step_msg();
+ return;
+
+#ifdef CONFIG_KGDB_THREAD
+
+ case 'H': /* Task related */
+ set_thread_msg();
+ break;
+
+ case 'T': /* Query thread status */
+ thread_status_msg();
+ break;
+
+ case 'q': /* Handle query - currently thread-related */
+ query_msg();
+ break;
+#endif
+
+ case 'k': /* 'Kill the program' with a kernel ? */
+ break;
+
+ case 'D': /* Detach from program, send reply OK */
+ kgdb_in_gdb_mode = 0;
+ send_ok_msg();
+ get_debug_char();
+ return;
+
+ default:
+ send_empty_msg();
+ break;
+ }
+ }
+}
+
+/* There has been an exception, most likely a breakpoint. */
+void kgdb_handle_exception(struct pt_regs *regs)
+{
+ int excep_code, vbr_val;
+ int count;
+ int trapa_value = ctrl_inl(TRA);
+
+ /* Copy kernel regs (from stack) */
+ for (count = 0; count < 16; count++)
+ trap_registers.regs[count] = regs->regs[count];
+ trap_registers.pc = regs->pc;
+ trap_registers.pr = regs->pr;
+ trap_registers.sr = regs->sr;
+ trap_registers.gbr = regs->gbr;
+ trap_registers.mach = regs->mach;
+ trap_registers.macl = regs->macl;
+
+ asm("stc vbr, %0":"=r"(vbr_val));
+ trap_registers.vbr = vbr_val;
+
+ /* Get excode for command loop call, user access */
+ asm("stc r2_bank, %0":"=r"(excep_code));
+ kgdb_excode = excep_code;
+
+ /* Other interesting environment items for reference */
+ asm("stc r6_bank, %0":"=r"(kgdb_g_imask));
+ kgdb_current = current;
+ kgdb_trapa_val = trapa_value;
+ kgdb_tregs = regs;
+
+ /* Act on the exception */
+ kgdb_command_loop(excep_code >> 5, trapa_value);
+
+ kgdb_current = NULL;
+
+ /* Copy back the (maybe modified) registers */
+ for (count = 0; count < 16; count++)
+ regs->regs[count] = trap_registers.regs[count];
+ regs->pc = trap_registers.pc;
+ regs->pr = trap_registers.pr;
+ regs->sr = trap_registers.sr;
+ regs->gbr = trap_registers.gbr;
+ regs->mach = trap_registers.mach;
+ regs->macl = trap_registers.macl;
+
+ vbr_val = trap_registers.vbr;
+ asm("ldc %0, vbr": :"r"(vbr_val));
+
+ return;
+}
+
+/* Trigger a breakpoint by function */
+void breakpoint(void)
+{
+ if (!kgdb_enabled) {
+ kgdb_enabled = 1;
+ kgdb_init();
+ }
+ BREAKPOINT();
+}
+
+/* Initialise the KGDB data structures and serial configuration */
+int kgdb_init(void)
+{
+ if (!kgdb_enabled)
+ return 1;
+
+ in_nmi = 0;
+ kgdb_nofault = 0;
+ stepped_opcode = 0;
+ kgdb_in_gdb_mode = 0;
+
+ /* Set up for serial comms */
+ if (kgdb_serial_setup == NULL) {
+ KGDB_PRINTK("no serial init function!!\n");
+ return -1;
+ }
+
+ if (kgdb_serial_setup() != 0) {
+ KGDB_PRINTK("serial setup error\n");
+ return -1;
+ }
+
+ /* Init ptr to exception handler */
+ kgdb_debug_hook = kgdb_handle_exception;
+ kgdb_bus_err_hook = kgdb_handle_bus_error;
+
+ /* Enter kgdb now if requested, or just report init done */
+ if (kgdb_halt) {
+ kgdb_in_gdb_mode = 1;
+ put_debug_char('+');
+ breakpoint();
+ }
+ else
+ {
+ KGDB_PRINTK("stub is initialized.\n");
+ }
+
+ return 0;
+}
+
+/* Make function available for "user messages"; console will use it too. */
+
+char gdbmsgbuf[BUFMAX];
+#define MAXOUT ((BUFMAX-2)/2)
+
+static void kgdb_msg_write(const char *s, unsigned count)
+{
+ int i;
+ int wcount;
+ char *bufptr;
+
+ /* 'O'utput */
+ gdbmsgbuf[0] = 'O';
+
+ /* Fill and send buffers... */
+ while (count > 0) {
+ bufptr = gdbmsgbuf + 1;
+
+ /* Calculate how many this time */
+ wcount = (count > MAXOUT) ? MAXOUT : count;
+
+ /* Pack in hex chars */
+ for (i = 0; i < wcount; i++)
+ bufptr = pack_hex_byte(bufptr, s[i]);
+ *bufptr = '\0';
+
+ /* Move up */
+ s += wcount;
+ count -= wcount;
+
+ /* Write packet */
+ put_packet(gdbmsgbuf);
+ }
+}
+
+static void kgdb_to_gdb(const char *s)
+{
+ kgdb_msg_write(s, strlen(s));
+}
+
+#ifdef CONFIG_SH_KGDB_CONSOLE
+void kgdb_console_write(struct console *co, const char *s, unsigned count)
+{
+ /* Bail if we're not talking to GDB */
+ if (!kgdb_in_gdb_mode)
+ return;
+
+ kgdb_msg_write(s, count);
+}
+#endif
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/mach_dc.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/mach_dc.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/mach_dc.c Sat Sep 8 22:29:09 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/mach_dc.c Mon Oct 15 22:44:49 2001
@@ -1,5 +1,5 @@
/*
- * $Id: mach_dc.c,v 1.5 2001/09/01 14:34:31 mrbrown Exp $
+ * $Id: mach_dc.c,v 1.1.1.1 2001/10/15 20:44:49 mrbrown Exp $
* SEGA Dreamcast machine vector
*/
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/mach_flexbox.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/mach_flexbox.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/mach_flexbox.c Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/mach_flexbox.c Sun Jun 23 12:04:57 2002
@@ -0,0 +1,73 @@
+/*
+ * linux/arch/sh/kernel/mach_flexbox.c
+ *
+ * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com)
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License. See linux/COPYING for more information.
+ *
+ * Machine specific code for FlexBox.
+ */
+
+#include
+#include
+
+#include
+#include
+
+#include
+
+#include
+/*
+ * The Machine Vector
+ */
+
+extern void flexbox_rtc_gettimeofday(struct timeval *tv);
+extern int flexbox_rtc_settimeofday(const struct timeval *tv);
+extern int setup_flexbox(void);
+
+struct sh_machine_vector mv_flexbox __initmv = {
+ mv_name: "FlexBox",
+
+ mv_nr_irqs: 48,
+
+ mv_inb: flexbox_inb,
+ mv_inw: flexbox_inw,
+ mv_inl: flexbox_inl,
+ mv_outb: flexbox_outb,
+ mv_outw: flexbox_outw,
+ mv_outl: flexbox_outl,
+
+ mv_inb_p: flexbox_inb_p,
+ mv_inw_p: flexbox_inw_p,
+ mv_inl_p: flexbox_inl_p,
+ mv_outb_p: flexbox_outb_p,
+ mv_outw_p: flexbox_outw_p,
+ mv_outl_p: flexbox_outl_p,
+
+ mv_insb: flexbox_insb,
+ mv_insw: flexbox_insw,
+ mv_insl: flexbox_insl,
+ mv_outsb: flexbox_outsb,
+ mv_outsw: flexbox_outsw,
+ mv_outsl: flexbox_outsl,
+
+ mv_readb: flexbox_readb,
+ mv_readw: flexbox_readw,
+ mv_readl: flexbox_readl,
+ mv_writeb: flexbox_writeb,
+ mv_writew: flexbox_writew,
+ mv_writel: flexbox_writel,
+
+ mv_ioremap: flexbox_ioremap,
+ mv_iounmap: flexbox_iounmap,
+
+ mv_isa_port2addr: flexbox_isa_port2addr,
+
+ mv_rtc_gettimeofday: flexbox_rtc_gettimeofday,
+ mv_rtc_settimeofday: flexbox_rtc_settimeofday,
+
+ mv_init_irq: init_flexbox_IRQ,
+ mv_init_arch: setup_flexbox,
+};
+ALIAS_MV(flexbox)
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/pci-dc.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/pci-dc.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/pci-dc.c Sat Sep 8 22:29:09 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/pci-dc.c Mon Oct 15 22:44:49 2001
@@ -1,5 +1,5 @@
/*
- $ $Id: pci-dc.c,v 1.5 2001/08/24 12:38:19 dwmw2 Exp $
+ $ $Id: pci-dc.c,v 1.1.1.1 2001/10/15 20:44:49 mrbrown Exp $
* Dreamcast PCI: Supports SEGA Broadband Adaptor only.
*/
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/pci-flexbox.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/pci-flexbox.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/pci-flexbox.c Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/pci-flexbox.c Wed May 29 13:34:52 2002
@@ -0,0 +1,126 @@
+/*
+ * linux/arch/sh/kernel/pci-flexbox.c
+ *
+ * Author: Ian DaSilva (idasilva@mvista.com)
+ *
+ * Highly leveraged from pci-bigsur.c, written by Dustin McIntire.
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License. See linux/COPYING for more information.
+ *
+ * PCI initialization for the FlexBox.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#define PCIMCR_MRSET_OFF 0xBFFFFFFF
+#define PCIMCR_RFSH_OFF 0xFFFFFFFB
+
+/*
+ * Only long word accesses of the PCIC's internal local registers and the
+ * configuration registers from the CPU is supported.
+ */
+#define PCIC_WRITE(x,v) writel((v), PCI_REG(x))
+#define PCIC_READ(x) readl(PCI_REG(x))
+
+/*
+ * Description: This function sets up and initializes the pcic, sets
+ * up the BARS, maps the DRAM into the address space etc, etc.
+ */
+int __init pcibios_init_platform(void)
+{
+ unsigned long bcr1, wcr1, wcr2, wcr3, mcr;
+ unsigned short bcr2;
+
+ /*
+ * Initialize the slave bus controller on the pcic. The values used
+ * here should not be hardcoded, but they should be taken from the bsc
+ * on the processor, to make this function as generic as possible.
+ * (i.e. Another sbc may usr different SDRAM timing settings -- in order
+ * for the pcic to work, its settings need to be exactly the same.)
+ */
+ bcr1 = (*(volatile unsigned long*)(SH7751_BCR1));
+ bcr2 = (*(volatile unsigned short*)(SH7751_BCR2));
+ wcr1 = (*(volatile unsigned long*)(SH7751_WCR1));
+ wcr2 = (*(volatile unsigned long*)(SH7751_WCR2));
+ wcr3 = (*(volatile unsigned long*)(SH7751_WCR3));
+ mcr = (*(volatile unsigned long*)(SH7751_MCR));
+
+ bcr1 = bcr1 | 0x00080000; /* Enable Bit 19, BREQEN */
+ (*(volatile unsigned long*)(SH7751_BCR1)) = bcr1;
+
+ bcr1 = bcr1 | 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
+ PCIC_WRITE(SH7751_PCIBCR1, bcr1); /* PCIC BCR1 */
+ PCIC_WRITE(SH7751_PCIBCR2, bcr2); /* PCIC BCR2 */
+ PCIC_WRITE(SH7751_PCIWCR1, wcr1); /* PCIC WCR1 */
+ PCIC_WRITE(SH7751_PCIWCR2, wcr2); /* PCIC WCR2 */
+ PCIC_WRITE(SH7751_PCIWCR3, wcr3); /* PCIC WCR3 */
+ mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
+ PCIC_WRITE(SH7751_PCIMCR, mcr); /* PCIC MCR */
+
+
+ /* Enable all interrupts, so we know what to fix */
+ PCIC_WRITE(SH7751_PCIINTM, 0x0000c3ff);
+ PCIC_WRITE(SH7751_PCIAINTM, 0x0000380f);
+
+ /* Set up standard PCI config registers */
+ PCIC_WRITE(SH7751_PCICONF1, 0xF39000C7); /* Bus Master, Mem & I/O access */
+ PCIC_WRITE(SH7751_PCICONF2, 0x00000000); /* PCI Class code & Revision ID */
+ PCIC_WRITE(SH7751_PCICONF4, 0xab000001); /* PCI I/O address (local regs) */
+ PCIC_WRITE(SH7751_PCICONF5, 0x08000000); /* PCI MEM address (local RAM) */
+ PCIC_WRITE(SH7751_PCICONF6, 0xd0000000); /* PCI MEM address (unused) */
+ PCIC_WRITE(SH7751_PCICONF11, 0x35051054); /* PCI Subsystem ID & Vendor ID */
+ PCIC_WRITE(SH7751_PCILSR0, 0x07f00000); /* MEM (full 64M exposed) */
+ PCIC_WRITE(SH7751_PCILSR1, 0x00000000); /* MEM (unused) */
+ PCIC_WRITE(SH7751_PCILAR0, 0x08000000); /* MEM (direct map from PCI) */
+ PCIC_WRITE(SH7751_PCILAR1, 0x00000000); /* MEM (unused) */
+
+ /* Now turn it on... */
+ PCIC_WRITE(SH7751_PCICR, 0xa5000001);
+
+ /*
+ * Set PCIMBR and PCIIOBR here, assuming a single window
+ * (16M MEM, 256K IO) is enough. If a larger space is
+ * needed, the readx/writex and inx/outx functions will
+ * have to do more (e.g. setting registers for each call).
+ */
+
+ /*
+ * Set the MBR so PCI address is one-to-one with window,
+ * meaning all calls go straight through... use ifdef to
+ * catch erroneous assumption.
+ */
+#if PCIBIOS_MIN_MEM != SH7751_PCI_MEMORY_BASE
+#error One-to-one assumption for PCI memory mapping is wrong!?!?!?
+#endif
+ PCIC_WRITE(SH7751_PCIMBR, PCIBIOS_MIN_MEM);
+
+ /* Set IOBR for window containing area specified in pci.h */
+ PCIC_WRITE(SH7751_PCIIOBR, (PCIBIOS_MIN_IO & SH7751_PCIIOBR_MASK));
+
+ /* All done, may as well say so... */
+ printk("SH7751 PCI: Finished initialization of the PCI controller\n");
+
+ return 1;
+}
+
+int __init pcibios_map_platform_irq(u8 slot, u8 pin)
+{
+ switch (slot) {
+ case 13: return 8;
+ case 14: return 2;
+ case 15: return 5;
+ default:
+ printk("PCI: Bad IRQ mapping request for slot %d\n", slot);
+ return -1;
+ }
+}
+
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/pci-sh7751.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/pci-sh7751.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/pci-sh7751.c Sun Nov 4 19:31:58 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/pci-sh7751.c Wed May 29 13:35:21 2002
@@ -199,11 +199,13 @@
struct pci_ops * __init pci_check_direct(void)
{
- unsigned int tmp, id;
+ unsigned int tmp, id, idr;
/* check for SH7751 hardware */
id = (SH7751_DEVICE_ID << 16) | SH7751_VENDOR_ID;
- if(inl(SH7751_PCIREG_BASE+SH7751_PCICONF0) != id) {
+ idr = (SH7751R_DEVICE_ID << 16) | SH7751_VENDOR_ID;
+ if( (inl(SH7751_PCIREG_BASE+SH7751_PCICONF0) != id) &&
+ (inl(SH7751_PCIREG_BASE+SH7751_PCICONF0) != idr) ) {
PCIDBG(2,"PCI: This is not an SH7751\n");
return NULL;
}
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/pcibios.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/pcibios.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/pcibios.c Sat Sep 8 22:29:09 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/pcibios.c Mon Oct 15 22:44:53 2001
@@ -1,5 +1,5 @@
/*
- * $Id: pcibios.c,v 1.1 2001/08/24 12:38:19 dwmw2 Exp $
+ * $Id: pcibios.c,v 1.1.1.1 2001/10/15 20:44:53 mrbrown Exp $
*
* arch/sh/kernel/pcibios.c
*
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/process.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/process.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/process.c Mon Oct 15 22:36:48 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/process.c Fri Mar 29 03:01:07 2002
@@ -1,4 +1,4 @@
-/* $Id: process.c,v 1.35 2001/10/11 09:18:17 gniibe Exp $
+/* $Id: process.c,v 1.1.1.1.2.1 2002/03/29 00:01:07 gniibe Exp $
*
* linux/arch/sh/kernel/process.c
*
@@ -45,8 +45,9 @@
while (1) {
if (hlt_counter) {
- if (current->need_resched)
- break;
+ while (1)
+ if (current->need_resched)
+ break;
} else {
__cli();
while (!current->need_resched) {
@@ -179,11 +180,7 @@
fpvalid = tsk->used_math;
if (fpvalid) {
- unsigned long flags;
-
- save_and_cli(flags);
unlazy_fpu(tsk);
- restore_flags(flags);
memcpy(fpu, &tsk->thread.fpu.hard, sizeof(*fpu));
}
@@ -203,15 +200,9 @@
#if defined(__SH4__)
struct task_struct *tsk = current;
- if (tsk != &init_task) {
- unsigned long flags;
-
- save_and_cli(flags);
- unlazy_fpu(tsk);
- restore_flags(flags);
- p->thread.fpu = current->thread.fpu;
- p->used_math = tsk->used_math;
- }
+ unlazy_fpu(tsk);
+ p->thread.fpu = current->thread.fpu;
+ p->used_math = tsk->used_math;
#endif
childregs = ((struct pt_regs *)(THREAD_SIZE + (unsigned long) p)) - 1;
*childregs = *regs;
@@ -257,13 +248,7 @@
void __switch_to(struct task_struct *prev, struct task_struct *next)
{
#if defined(__SH4__)
- if (prev != &init_task) {
- unsigned long flags;
-
- save_and_cli(flags);
- unlazy_fpu(prev);
- restore_flags(flags);
- }
+ unlazy_fpu(prev);
#endif
/*
* Restore the kernel mode register
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/ptrace.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/ptrace.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/ptrace.c Mon Oct 15 22:36:48 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/ptrace.c Mon Oct 15 22:44:51 2001
@@ -1,4 +1,4 @@
-/* $Id: ptrace.c,v 1.13 2001/10/01 02:21:50 gniibe Exp $
+/* $Id: ptrace.c,v 1.1.1.1 2001/10/15 20:44:51 mrbrown Exp $
*
* linux/arch/sh/kernel/ptrace.c
*
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/rtc-flexbox.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/rtc-flexbox.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/rtc-flexbox.c Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/rtc-flexbox.c Thu Oct 17 14:47:53 2002
@@ -0,0 +1,372 @@
+/*
+ * linux/arch/sh/kernel/rtc.c -- Flexbox RTC Ricoh Rx5C348
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+extern int flex_rev;
+
+static volatile unsigned char *SCSMR = (unsigned char *) 0xffe00000;
+#define SYNC 0x80
+
+static volatile unsigned char *SCBRR = (unsigned char *) 0xffe00004;
+
+static volatile unsigned char *SCSCR = (unsigned char *) 0xffe00008;
+#define TE 0x20
+#define RE 0x10
+
+static volatile unsigned char *SCTDR = (unsigned char *) 0xffe0000c;
+static volatile unsigned char *SCSSR = (unsigned char *) 0xffe00010;
+#define TDRE 0x80
+#define RDRF 0x40
+#define ORER 0x20
+#define TEND 0x04
+
+static volatile unsigned char *SCRDR = (unsigned char *) 0xffe00014;
+
+#define rev(c) ( \
+ ((c & 0x01) << 7) | ((c & 0x02) << 5) | ((c & 0x04) << 3) | \
+ ((c & 0x08) << 1) | ((c & 0x80) >> 7) | ((c & 0x40) >> 5) | \
+ ((c & 0x20) >> 3) | ((c & 0x10) >> 1))
+#define set_sci \
+ scbrr = *SCBRR; \
+ *SCSCR = 0; \
+ *SCSMR = SYNC; \
+ *SCBRR = 30
+
+static volatile unsigned short *SCSPTR2 = (unsigned short *) 0xffe80020;
+#define CS0 0xB0
+#define CS1 0xE0
+#define CS01 0xA0
+#define CSNUL 0xF0
+
+void set_cs(int card) {
+ unsigned int i;
+ volatile unsigned char *ii, *jj;
+ volatile unsigned char j;
+
+ if(flex_rev==1) {
+ if(card==0){
+ *SCSPTR2 = CS1;
+ } else if(card==1) {
+ *SCSPTR2 = CS0;
+ } else {
+ *SCSPTR2 = CSNUL;
+ }
+ return ;
+ }
+
+ i = flex_out& ~0x20;
+ i |= 0x1e;
+
+ if (card==11) {
+ i |= 0x20;
+ } else if ((card>-1)&&(card<4)) {
+ i &= 0xfffef>>card;
+ }
+
+ flex_out = i;
+
+ ii = (volatile unsigned char *) (i | 0xa4000000);
+ jj = (volatile unsigned char *) (i | 0xb4000000);
+
+ j=*ii;
+ j=*jj;
+}
+
+EXPORT_SYMBOL(set_cs);
+
+static int read_rtc(int t, __u8 *in, __u8 *out) {
+
+ int i, o, s;
+
+ set_cs(11);
+
+ i=0;
+ o=0;
+
+ *SCSSR = 0;
+ *SCSCR = TE | RE;
+
+ while(i>4)*10)
+#endif
+
+#ifndef BIN_TO_BCD
+#define BIN_TO_BCD(val) ((val)=(((val)/10)<<4) + (val)%10)
+#endif
+
+void flexbox_rtc_gettimeofday(struct timeval *tv)
+{
+ unsigned int sec, min, hr, day, mon, yr, yr100;
+ static int first=1;
+
+ __u8 in[9], out[9];
+ int j, scbrr;
+
+ set_sci;
+
+ if(first) {
+ out[0]=0xe0;
+ out[1]=0x30;
+ out[2]=0x88;
+ read_rtc(3, in, out);
+ first=0;
+ }
+
+again:
+
+ for(j=1;j<9;j++) out[j]=0xff;
+ out[0]=0xf4;
+
+ read_rtc(9, in, out);
+
+ sec = in[2];
+ min = in[3];
+ hr = in[4];
+ day = in[6];
+ mon = in[7] & 0x7f;
+ yr = in[8];
+ yr100 = in[6]&0x80 ? 20 : 19;
+
+ BCD_TO_BIN(yr100);
+ BCD_TO_BIN(yr);
+ BCD_TO_BIN(mon);
+ BCD_TO_BIN(day);
+ BCD_TO_BIN(hr);
+ BCD_TO_BIN(min);
+ BCD_TO_BIN(sec);
+
+ if (yr > 99 || mon < 1 || mon > 12 || day > 31 || day < 1 ||
+ hr > 23 || min > 59 || sec > 59) {
+ printk(KERN_ERR
+ "5C348 RTC: invalid value, resetting to 1 Jan 2000\n");
+ printk(KERN_ERR
+ "yr=%i mon=%i day=%i hr=%i min=%i sec=%i\n",yr,mon,day,hr,min,sec);
+ out[0]=0xf0;
+ out[1]=0x10;
+ out[2]=0;
+ out[3]=0;
+ out[4]=0;
+ out[5]=0;
+ out[6]=1;
+ out[7]=0x81;
+ out[8]=0;
+ read_rtc(9, in, out);
+ goto again;
+ }
+
+ *SCBRR = scbrr;
+
+ tv->tv_sec = mktime(yr100 * 100 + yr, mon, day, hr, min, sec);
+ tv->tv_usec = 0;
+}
+
+int flexbox_rtc_settimeofday(const struct timeval *tv)
+{
+ unsigned long nowtime = tv->tv_sec;
+ int retval = 0;
+ int real_seconds, real_minutes, cmos_minutes;
+ __u8 in[4], out[4];
+ int j, scbrr;
+
+ set_sci;
+
+ for(j=1;j<4;j++) out[j]=0xff;
+ out[0]=0xf4;
+ read_rtc(4, in, out);
+ cmos_minutes = in[3];
+ BCD_TO_BIN(cmos_minutes);
+
+ /*
+ * since we're only adjusting minutes and seconds,
+ * don't interfere with hour overflow. This avoids
+ * messing with unknown time zones but requires your
+ * RTC not to be off by more than 15 minutes
+ */
+ real_seconds = nowtime % 60;
+ real_minutes = nowtime / 60;
+ if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
+ real_minutes += 30; /* correct for half hour time zone */
+ real_minutes %= 60;
+
+ if (abs(real_minutes - cmos_minutes) < 30) {
+ for(j=1;j<4;j++) out[j]=0xff;
+ out[0]=0xf0;
+ out[1]=0x10;
+ out[2]=BIN_TO_BCD(real_seconds);
+ out[3]=BIN_TO_BCD(real_minutes);
+ read_rtc(4, in, out);
+ } else {
+ printk(KERN_WARNING
+ "set_rtc_time: can't update from %d to %d\n",
+ cmos_minutes, real_minutes);
+ retval = -1;
+ }
+
+ *SCBRR = scbrr;
+
+ return retval;
+}
+
+int CMOS_READ(int addr) {
+ unsigned char val=0;
+ __u8 in[4], out[4];
+ int j, scbrr;
+
+ if(flex_rev<2) return __CMOS_READ(addr,w);
+
+ set_sci;
+
+ for(j=1;j<4;j++) out[j]=0xff;
+
+ switch(addr) {
+ case RTC_SECONDS:
+ out[0]=0x04;
+ read_rtc(2, in, out);
+ val=in[1];
+ break;
+ case RTC_MINUTES:
+ out[0]=0x14;
+ read_rtc(2, in, out);
+ val=in[1];
+ break;
+ case RTC_HOURS:
+ out[0]=0x24;
+ read_rtc(2, in, out);
+ val=in[1];
+ break;
+ case RTC_DAY_OF_WEEK:
+ out[0]=0x34;
+ read_rtc(2, in, out);
+ val=in[1];
+ break;
+ case RTC_DAY_OF_MONTH:
+ out[0]=0x44;
+ read_rtc(2, in, out);
+ val=in[1];
+ break;
+ case RTC_MONTH:
+ out[0]=0x54;
+ read_rtc(2, in, out);
+ val=in[1] & 0x7f;
+ break;
+ case RTC_YEAR:
+ out[0]=0x64;
+ read_rtc(2, in, out);
+ val=in[1];
+ break;
+ case RTC_SECONDS_ALARM:
+ val=0;
+ break;
+ case RTC_MINUTES_ALARM:
+ out[0]=0xb4;
+ read_rtc(2, in, out);
+ val=in[1];
+ break;
+ case RTC_HOURS_ALARM:
+ out[0]=0xc4;
+ read_rtc(2, in, out);
+ val=in[1];
+ break;
+ case RTC_REG_D: /* RTC_VALID */
+ /* Always valid ... */
+ val = RTC_VRT;
+ break;
+ }
+
+ *SCBRR = scbrr;
+
+ return val;
+}
+
+int CMOS_WRITE(int val, int addr) {
+ __u8 in[4], out[4];
+ int j, scbrr;
+
+ if(flex_rev<2) {
+ __CMOS_WRITE(val, addr, w);
+ return 0;
+ }
+
+ set_sci;
+
+ for(j=2;j<4;j++) out[j]=0xff;
+ out[1]=val;
+
+ switch(addr) {
+ case RTC_SECONDS:
+ out[0]=0x08;
+ read_rtc(2, in, out);
+ break;
+ case RTC_MINUTES:
+ out[0]=0x18;
+ read_rtc(2, in, out);
+ break;
+ case RTC_HOURS:
+ out[0]=0x28;
+ read_rtc(2, in, out);
+ break;
+ case RTC_DAY_OF_WEEK:
+ out[0]=0x38;
+ read_rtc(2, in, out);
+ break;
+ case RTC_DAY_OF_MONTH:
+ out[0]=0x48;
+ read_rtc(2, in, out);
+ break;
+ case RTC_MONTH:
+ out[0]=0x58;
+ out[1] |= 0x80; /* 21st century */
+ read_rtc(2, in, out);
+ break;
+ case RTC_YEAR:
+ out[0]=0x68;
+ read_rtc(2, in, out);
+ break;
+ case RTC_SECONDS_ALARM:
+ break;
+ case RTC_MINUTES_ALARM:
+ out[0]=0xb8;
+ read_rtc(2, in, out);
+ break;
+ case RTC_HOURS_ALARM:
+ out[0]=0xc8;
+ read_rtc(2, in, out);
+ break;
+ }
+ *SCBRR = scbrr;
+
+ return val;
+}
+
+
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/setup.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/setup.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/setup.c Sat Nov 17 04:38:39 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/setup.c Wed May 29 11:53:52 2002
@@ -1,4 +1,4 @@
-/* $Id: setup.c,v 1.31 2001/08/23 16:36:40 dwmw2 Exp $
+/* $Id: setup.c,v 1.1.1.1.2.3 2002/05/10 17:58:54 jzs Exp $
*
* linux/arch/sh/kernel/setup.c
*
@@ -44,6 +44,11 @@
#include
#endif
+#ifdef CONFIG_SH_KGDB
+#include
+static int kgdb_parse_options(char *options);
+#endif
+
/*
* Machine setup..
*/
@@ -485,9 +490,8 @@
}
#if defined(__SH4__)
- /* We already grab/initialized FPU in head.S. Make it consisitent. */
- init_task.used_math = 1;
- init_task.flags |= PF_USEDFPU;
+ init_task.used_math = 0;
+ init_task.flags &= ~PF_USEDFPU;
#endif
paging_init();
}
@@ -563,4 +567,94 @@
stop: c_stop,
show: show_cpuinfo,
};
-#endif
+#endif /* CONFIG_PROC_FS */
+
+#ifdef CONFIG_SH_KGDB
+/*
+ * Parse command-line kgdb options. By default KGDB is enabled,
+ * entered on error (or other action) using default serial info.
+ * The command-line option can include a serial port specification
+ * and an action to override default or configured behavior.
+ */
+struct kgdb_sermap kgdb_sci_sermap =
+{ "ttySC", 5, kgdb_sci_setup, NULL };
+
+struct kgdb_sermap *kgdb_serlist = &kgdb_sci_sermap;
+struct kgdb_sermap *kgdb_porttype = &kgdb_sci_sermap;
+
+void kgdb_register_sermap(struct kgdb_sermap *map)
+{
+ struct kgdb_sermap *last;
+
+ for (last = kgdb_serlist; last->next; last = last->next)
+ ;
+ last->next = map;
+ if (!map->namelen) {
+ map->namelen = strlen(map->name);
+ }
+}
+
+static int __init kgdb_parse_options(char *options)
+{
+ char c;
+ int baud;
+
+ /* Check for port spec (or use default) */
+
+ /* Determine port type and instance */
+ if (!memcmp(options, "tty", 3)) {
+ struct kgdb_sermap *map = kgdb_serlist;
+
+ while (map && memcmp(options, map->name, map->namelen))
+ map = map->next;
+
+ if (!map) {
+ KGDB_PRINTK("unknown port spec in %s\n", options);
+ return -1;
+ }
+
+ kgdb_porttype = map;
+ kgdb_serial_setup = map->setup_fn;
+ kgdb_portnum = options[map->namelen] - '0';
+ options += map->namelen + 1;
+
+ options = (*options == ',') ? options+1 : options;
+
+ /* Read optional parameters (baud/parity/bits) */
+ baud = simple_strtoul(options, &options, 10);
+ if (baud != 0) {
+ kgdb_baud = baud;
+
+ c = toupper(*options);
+ if (c == 'E' || c == 'O' || c == 'N') {
+ kgdb_parity = c;
+ options++;
+ }
+
+ c = *options;
+ if (c == '7' || c == '8') {
+ kgdb_bits = c;
+ options++;
+ }
+ options = (*options == ',') ? options+1 : options;
+ }
+ }
+
+ /* Check for action specification */
+ if (!memcmp(options, "halt", 4)) {
+ kgdb_halt = 1;
+ options += 4;
+ } else if (!memcmp(options, "disabled", 8)) {
+ kgdb_enabled = 0;
+ options += 8;
+ }
+
+ if (*options) {
+ KGDB_PRINTK("ignored unknown options: %s\n", options);
+ return 0;
+ }
+ return 1;
+}
+__setup("kgdb=", kgdb_parse_options);
+#endif /* CONFIG_SH_KGDB */
+
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/setup_cqreek.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/setup_cqreek.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/setup_cqreek.c Sat Sep 8 22:29:09 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/setup_cqreek.c Mon Oct 15 22:44:51 2001
@@ -1,4 +1,4 @@
-/* $Id: setup_cqreek.c,v 1.9 2001/07/30 12:43:28 gniibe Exp $
+/* $Id: setup_cqreek.c,v 1.1.1.1 2001/10/15 20:44:51 mrbrown Exp $
*
* arch/sh/kernel/setup_cqreek.c
*
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/setup_flexbox.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/setup_flexbox.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/setup_flexbox.c Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/setup_flexbox.c Sat Jun 29 21:10:25 2002
@@ -0,0 +1,66 @@
+/*
+ * linux/arch/sh/kernel/setup_flexboxx.c
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+int flex_out;
+int flex_rev;
+
+int __init init_flexbox_IRQ(void)
+{
+ make_ipr_irq(2, INTC_IPRD, 3, 3);
+ make_ipr_irq(5, INTC_IPRD, 2, 3);
+ make_ipr_irq(8, INTC_IPRD, 1, 3);
+ make_ipr_irq(11, INTC_IPRD, 0, 0);
+ ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); /* IRL in edge mode */
+ return 0;
+}
+
+int __init setup_flexbox(void) {
+#define TIMEOUT 1000000
+#ifdef CONFIG_CPU_SUBTYPE_SH7751
+ volatile unsigned char *r64 = (volatile unsigned char *)R64CNT;
+ int i;
+ unsigned char j;
+
+ j=*r64;
+ for(i=0;i
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/setup_se.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/setup_se.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/setup_se.c Wed Aug 9 23:59:04 2000
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/setup_se.c Fri May 10 20:58:54 2002
@@ -1,4 +1,4 @@
-/* $Id: setup_se.c,v 1.6 2000/05/14 08:41:25 gniibe Exp $
+/* $Id: setup_se.c,v 1.1.1.1.2.2 2002/05/10 17:58:54 jzs Exp $
*
* linux/arch/sh/kernel/setup_se.c
*
@@ -18,6 +18,10 @@
#include
#include
+#ifdef CONFIG_SH_KGDB
+#include
+#endif
+
/*
* Configure the Super I/O chip
*/
@@ -108,6 +112,11 @@
make_ipr_irq( 2, BCR_ILCRG, 0, 0x0f- 2); /* SLOTIRQ1 */
}
+#ifdef CONFIG_SH_KGDB
+static int kgdb_uart_setup(void);
+static struct kgdb_sermap kgdb_uart_sermap =
+{ "ttyS", 0, kgdb_uart_setup, NULL };
+#endif
/*
* Initialize the board
@@ -116,4 +125,133 @@
{
init_smsc();
/* XXX: RTC setting comes here */
+#ifdef CONFIG_SH_KGDB
+ kgdb_register_sermap(&kgdb_uart_sermap);
+#endif
+}
+
+/*********************************************************************
+ * Currently a hack (e.g. does not interact well w/serial.c, lots of *
+ * hardcoded stuff) but may be useful if SCI/F needs debugging. *
+ * Mostly copied from x86 code (see files asm-i386/kgdb_local.h and *
+ * arch/i386/lib/kgdb_serial.c). *
+ *********************************************************************/
+
+#ifdef CONFIG_SH_KGDB
+#include
+#include
+#include
+#include
+
+#define COM1_PORT 0x3f8 /* Base I/O address */
+#define COM1_IRQ 4 /* IRQ not used yet */
+#define COM2_PORT 0x2f8 /* Base I/O address */
+#define COM2_IRQ 3 /* IRQ not used yet */
+
+#define SB_CLOCK 1843200 /* Serial baud clock */
+#define SB_BASE (SB_CLOCK/16)
+#define SB_MCR UART_MCR_OUT2 | UART_MCR_DTR | UART_MCR_RTS
+
+struct uart_port {
+ int base;
+};
+#define UART_NPORTS 2
+struct uart_port uart_ports[] = {
+ { COM1_PORT },
+ { COM2_PORT },
+};
+struct uart_port *kgdb_uart_port;
+
+#define UART_IN(reg) inb_p(kgdb_uart_port->base + reg)
+#define UART_OUT(reg,v) outb_p((v), kgdb_uart_port->base + reg)
+
+/* Basic read/write functions for the UART */
+#define UART_LSR_RXCERR (UART_LSR_BI | UART_LSR_FE | UART_LSR_PE)
+static int kgdb_uart_getchar(void)
+{
+ int lsr;
+ int c = -1;
+
+ while (c == -1) {
+ lsr = UART_IN(UART_LSR);
+ if (lsr & UART_LSR_DR)
+ c = UART_IN(UART_RX);
+ if ((lsr & UART_LSR_RXCERR))
+ c = -1;
+ }
+ return c;
+}
+
+static void kgdb_uart_putchar(int c)
+{
+ while ((UART_IN(UART_LSR) & UART_LSR_THRE) == 0)
+ ;
+ UART_OUT(UART_TX, c);
+}
+
+/*
+ * Initialize UART to configured/requested values.
+ * (But we don't interrupts yet, or interact w/serial.c)
+ */
+static int kgdb_uart_setup(void)
+{
+ int port;
+ int lcr = 0;
+ int bdiv = 0;
+
+ if (kgdb_portnum >= UART_NPORTS) {
+ KGDB_PRINTK("uart port %d invalid.\n", kgdb_portnum);
+ return -1;
+ }
+
+ kgdb_uart_port = &uart_ports[kgdb_portnum];
+
+ /* Init sequence from gdb_hook_interrupt */
+ UART_IN(UART_RX);
+ UART_OUT(UART_IER, 0);
+
+ UART_IN(UART_RX); /* Serial driver comments say */
+ UART_IN(UART_IIR); /* this clears interrupt regs */
+ UART_IN(UART_MSR);
+
+ /* Figure basic LCR values */
+ switch (kgdb_bits) {
+ case '7':
+ lcr |= UART_LCR_WLEN7;
+ break;
+ default: case '8':
+ lcr |= UART_LCR_WLEN8;
+ break;
+ }
+ switch (kgdb_parity) {
+ case 'O':
+ lcr |= UART_LCR_PARITY;
+ break;
+ case 'E':
+ lcr |= (UART_LCR_PARITY | UART_LCR_EPAR);
+ break;
+ default: break;
+ }
+
+ /* Figure the baud rate divisor */
+ bdiv = (SB_BASE/kgdb_baud);
+
+ /* Set the baud rate and LCR values */
+ UART_OUT(UART_LCR, (lcr | UART_LCR_DLAB));
+ UART_OUT(UART_DLL, (bdiv & 0xff));
+ UART_OUT(UART_DLM, ((bdiv >> 8) & 0xff));
+ UART_OUT(UART_LCR, lcr);
+
+ /* Set the MCR */
+ UART_OUT(UART_MCR, SB_MCR);
+
+ /* Turn off FIFOs for now */
+ UART_OUT(UART_FCR, 0);
+
+ /* Setup complete: initialize function pointers */
+ kgdb_getchar = kgdb_uart_getchar;
+ kgdb_putchar = kgdb_uart_putchar;
+
+ return 0;
}
+#endif /* CONFIG_SH_KGDB */
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/sh_bios.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/sh_bios.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/sh_bios.c Mon Jan 29 04:56:00 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/sh_bios.c Mon Oct 15 22:44:52 2001
@@ -1,4 +1,4 @@
-/* $Id: sh_bios.c,v 1.5 2001/01/08 08:42:32 gniibe Exp $
+/* $Id: sh_bios.c,v 1.1.1.1 2001/10/15 20:44:52 mrbrown Exp $
*
* linux/arch/sh/kernel/sh_bios.c
* C interface for trapping into the standard LinuxSH BIOS.
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/sh_ksyms.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/sh_ksyms.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/sh_ksyms.c Mon Feb 25 21:37:56 2002
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/sh_ksyms.c Mon Sep 30 20:00:23 2002
@@ -24,6 +24,8 @@
extern void dump_thread(struct pt_regs *, struct user *);
extern int dump_fpu(elf_fpregset_t *);
extern struct hw_interrupt_type no_irq_type;
+extern void p3_iounmap(void *vaddr);
+extern void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags);
/* platform dependent support */
EXPORT_SYMBOL(dump_thread);
@@ -56,6 +58,7 @@
#endif
/* mem exports */
+EXPORT_SYMBOL(memscan);
EXPORT_SYMBOL(memchr);
EXPORT_SYMBOL(memcpy);
EXPORT_SYMBOL(memcpy_fromio);
@@ -77,6 +80,7 @@
EXPORT_SYMBOL(__up);
EXPORT_SYMBOL(__down);
EXPORT_SYMBOL(__down_interruptible);
+EXPORT_SYMBOL(__down_trylock);
EXPORT_SYMBOL(__udelay);
EXPORT_SYMBOL(__const_udelay);
@@ -95,10 +99,18 @@
DECLARE_EXPORT(__movstr_i4_even);
DECLARE_EXPORT(__movstr_i4_odd);
+DECLARE_EXPORT(__movstrSI12_i4);
/* needed by some modules */
EXPORT_SYMBOL(flush_cache_all);
EXPORT_SYMBOL(flush_cache_range);
EXPORT_SYMBOL(flush_dcache_page);
#endif
+
EXPORT_SYMBOL(flush_tlb_page);
+EXPORT_SYMBOL(sh_mv);
+EXPORT_SYMBOL(__flush_purge_region);
+EXPORT_SYMBOL_NOVERS(__copy_user);
+EXPORT_SYMBOL(p3_ioremap);
+EXPORT_SYMBOL(p3_iounmap);
+
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/signal.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/signal.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/signal.c Mon Oct 15 22:36:48 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/signal.c Fri Mar 29 03:01:07 2002
@@ -1,4 +1,4 @@
-/* $Id: signal.c,v 1.21 2000/03/11 14:06:21 gniibe Exp $
+/* $Id: signal.c,v 1.1.1.1.2.1 2002/03/29 00:01:07 gniibe Exp $
*
* linux/arch/sh/kernel/signal.c
*
@@ -196,27 +196,20 @@
static inline int save_sigcontext_fpu(struct sigcontext *sc)
{
struct task_struct *tsk = current;
- unsigned long flags;
- int val;
if (!tsk->used_math) {
- val = 0;
- __copy_to_user(&sc->sc_ownedfp, &val, sizeof(int));
+ __put_user(0, &sc->sc_ownedfp);
return 0;
}
- val = 1;
- __copy_to_user(&sc->sc_ownedfp, &val, sizeof(int));
+ __put_user(1, &sc->sc_ownedfp);
/* This will cause a "finit" to be triggered by the next
attempted FPU operation by the 'current' process.
*/
tsk->used_math = 0;
- save_and_cli(flags);
unlazy_fpu(tsk);
- restore_flags(flags);
-
return __copy_to_user(&sc->sc_fpregs[0], &tsk->thread.fpu.hard,
sizeof(long)*(16*2+2));
}
@@ -255,7 +248,7 @@
}
#endif
- regs->syscall_nr = -1; /* disable syscall checks */
+ regs->tra = -1; /* disable syscall checks */
err |= __get_user(*r0_p, &sc->sc_regs[0]);
return err;
}
@@ -524,7 +517,7 @@
siginfo_t *info, sigset_t *oldset, struct pt_regs * regs)
{
/* Are we from a system call? */
- if (regs->syscall_nr >= 0) {
+ if (regs->tra >= 0) {
/* If so, check system call restarting.. */
switch (regs->regs[0]) {
case -ERESTARTNOHAND:
@@ -538,7 +531,6 @@
}
/* fallthrough */
case -ERESTARTNOINTR:
- regs->regs[0] = regs->syscall_nr;
regs->pc -= 2;
}
}
@@ -685,12 +677,11 @@
}
/* Did we come from a system call? */
- if (regs->syscall_nr >= 0) {
+ if (regs->tra >= 0) {
/* Restart the system call - no handlers present */
if (regs->regs[0] == -ERESTARTNOHAND ||
regs->regs[0] == -ERESTARTSYS ||
regs->regs[0] == -ERESTARTNOINTR) {
- regs->regs[0] = regs->syscall_nr;
regs->pc -= 2;
}
}
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/time.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/time.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/time.c Sat Sep 8 22:29:09 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/time.c Fri Jun 28 12:24:48 2002
@@ -1,4 +1,4 @@
-/* $Id: time.c,v 1.30 2001/09/01 14:34:31 mrbrown Exp $
+/* $Id: time.c,v 1.1.1.1.2.3 2002/05/10 17:58:54 jzs Exp $
*
* linux/arch/sh/kernel/time.c
*
@@ -29,15 +29,21 @@
#include
#include
#include
+#ifdef CONFIG_SH_KGDB
+#include
+#endif
#include
#include
-#define TMU_TOCR_INIT 0x00
-#define TMU0_TCR_INIT 0x0020
-#define TMU_TSTR_INIT 1
+#define TMU_TOCR_INIT 0x00 /* Don't output RTC clock */
+
+#define TMU0_TCR_INIT 0x0020 /* Clock/4, rising edge; interrupt on */
+#define TMU0_TCR_CALIB 0x0000 /* Clock/4, rising edge; no interrupt */
+#define TMU0_TSTR_INIT 0x01 /* Bit to turn on TMU0 */
-#define TMU0_TCR_CALIB 0x0000
+#define TMU1_TCR_INIT 0x0000 /* Clock/4, rising edge; no interrupt */
+#define TMU1_TSTR_INIT 0x02 /* Bit to turn on TMU1 */
#if defined(__sh3__)
#define TMU_TOCR 0xfffffe90 /* Byte access */
@@ -47,6 +53,10 @@
#define TMU0_TCNT 0xfffffe98 /* Long access */
#define TMU0_TCR 0xfffffe9c /* Word access */
+#define TMU1_TCOR 0xfffffea0 /* Long access */
+#define TMU1_TCNT 0xfffffea4 /* Long access */
+#define TMU1_TCR 0xfffffea8 /* Word access */
+
#define FRQCR 0xffffff80
#elif defined(__SH4__)
#define TMU_TOCR 0xffd80000 /* Byte access */
@@ -56,6 +66,10 @@
#define TMU0_TCNT 0xffd8000c /* Long access */
#define TMU0_TCR 0xffd80010 /* Word access */
+#define TMU1_TCOR 0xffd80014 /* Long access */
+#define TMU1_TCNT 0xffd80018 /* Long access */
+#define TMU1_TCR 0xffd8001c /* Word access */
+
#define FRQCR 0xffc00000
/* Core Processor Version Register */
@@ -176,6 +190,25 @@
/* last time the RTC clock got updated */
static long last_rtc_update;
+static __inline__ void sh_do_profile (unsigned long pc)
+{
+ extern int _stext;
+
+ if (!prof_buffer)
+ return;
+
+ pc -= (unsigned long) &_stext;
+ pc >>= prof_shift;
+ /*
+ * Don't ignore out-of-bounds PC values silently,
+ * put them into the last histogram slot, so if
+ * present, they will show up as a sharp peak.
+ */
+ if (pc > prof_len-1)
+ pc = prof_len-1;
+ prof_buffer[pc]++;
+}
+
/*
* timer_interrupt() needs to keep up the real-time clock,
* as well as call the "do_timer()" routine every clocktick
@@ -257,7 +290,7 @@
} while (tv1.tv_usec == tv2.tv_usec && tv1.tv_sec == tv2.tv_sec);
/* actually start the timer */
- ctrl_outb(TMU_TSTR_INIT, TMU_TSTR);
+ ctrl_outb(TMU0_TSTR_INIT, TMU_TSTR);
do {
rtc_gettimeofday(&tv2);
@@ -363,8 +396,10 @@
setup_irq(TIMER_IRQ, &irq0);
+#ifdef CONFIG_SH_FLEXBOX
+ if(flex_rev==2) timer_freq = 15000000; else
+#endif
timer_freq = get_timer_frequency();
-
module_clock = timer_freq * 4;
#if defined(__sh3__)
@@ -463,11 +498,30 @@
#endif
current_cpu_data.module_clock = module_clock;
- /* Start TMU0 */
+ /* Stop all timers */
ctrl_outb(0, TMU_TSTR);
ctrl_outb(TMU_TOCR_INIT, TMU_TOCR);
+
+ /* Start TMU0 (jiffy interrupts) */
ctrl_outw(TMU0_TCR_INIT, TMU0_TCR);
ctrl_outl(interval, TMU0_TCOR);
ctrl_outl(interval, TMU0_TCNT);
- ctrl_outb(TMU_TSTR_INIT, TMU_TSTR);
+ ctrl_outb(TMU0_TSTR_INIT, TMU_TSTR);
+
+#if defined(CONFIG_START_TMU1)
+ /* Start TMU1 (free-running) */
+ ctrl_outw(TMU1_TCR_INIT, TMU1_TCR);
+ ctrl_outl(0xffffffff, TMU1_TCOR);
+ ctrl_outl(0xffffffff, TMU1_TCNT);
+ ctrl_outb((ctrl_inb(TMU_TSTR) | TMU1_TSTR_INIT), TMU_TSTR);
+#endif
+
+#if defined(CONFIG_SH_KGDB)
+ /*
+ * Set up kgdb as requested. We do it here because the serial
+ * init uses the timer vars we just set up for figuring baud.
+ */
+ kgdb_init();
+#endif
+
}
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/traps.c /usr/src/sh/7751/cvs/linux/arch/sh/kernel/traps.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/kernel/traps.c Mon Feb 25 21:37:56 2002
+++ /usr/src/sh/7751/cvs/linux/arch/sh/kernel/traps.c Wed Oct 9 14:43:38 2002
@@ -1,10 +1,11 @@
-/* $Id: traps.c,v 1.14 2001/07/24 08:07:10 gniibe Exp $
+/* $Id: traps.c,v 1.1.1.1.2.4 2002/05/10 17:58:54 jzs Exp $
*
* linux/arch/sh/traps.c
*
* SuperH version: Copyright (C) 1999 Niibe Yutaka
* Copyright (C) 2000 Philipp Rumpf
* Copyright (C) 2000 David Howells
+ * Copyright (C) 2002 Paul Mundt
*/
/*
@@ -31,6 +32,19 @@
#include
#include
+#ifdef CONFIG_SH_KGDB
+#include
+#define CHK_REMOTE_DEBUG(regs) \
+{ \
+ if ((kgdb_debug_hook != (kgdb_debug_hook_t *) NULL) && (!user_mode(regs))) \
+ { \
+ (*kgdb_debug_hook)(regs); \
+ } \
+}
+#else
+#define CHK_REMOTE_DEBUG(regs)
+#endif
+
#define DO_ERROR(trapnr, signr, str, name, tsk) \
asmlinkage void do_##name(unsigned long r4, unsigned long r5, \
unsigned long r6, unsigned long r7, \
@@ -42,6 +56,7 @@
sti(); \
tsk->thread.error_code = error_code; \
tsk->thread.trap_no = trapnr; \
+ CHK_REMOTE_DEBUG(®s); \
force_sig(signr, tsk); \
die_if_no_fixup(str,®s,error_code); \
}
@@ -61,6 +76,7 @@
console_verbose();
spin_lock_irq(&die_lock);
printk("%s: %04lx\n", str, err & 0xffff);
+ CHK_REMOTE_DEBUG(regs);
show_regs(regs);
spin_unlock_irq(&die_lock);
do_exit(SIGSEGV);
@@ -165,9 +181,11 @@
src = (unsigned char*) rm;
dst = (unsigned char*) *rn;
dst += (instruction&0x000F)<<2;
-
- if (copy_to_user(dst,src,4))
+//printk(KERN_WARNING "dst = %08x\n", (unsigned int)dst);
+ if (copy_to_user(dst,src,4)) {
+//printk(KERN_WARNING "HERE\n");
goto fetch_fault;
+ }
ret = 0;
break;
@@ -300,10 +318,19 @@
/*
* handle an instruction that does an unaligned memory access
* - have to be careful of branch delay-slot instructions that fault
+ * SH3:
* - if the branch would be taken PC points to the branch
* - if the branch would not be taken, PC points to delay-slot
+ * SH4:
+ * - PC always points to delayed branch
* - return 0 if handled, -EFAULT if failed (may not return if in kernel)
*/
+
+/* Macros to determine offset from current PC for branch instructions */
+/* Explicit type coercion is used to force sign extension where needed */
+#define SH_PC_8BIT_OFFSET(instr) ((((signed char)(instr))*2) + 4)
+#define SH_PC_12BIT_OFFSET(instr) ((((signed short)(instr<<4))>>3) + 4)
+
static int handle_unaligned_access(u16 instruction, struct pt_regs *regs)
{
u_int rm;
@@ -392,15 +419,27 @@
break;
case 0x0F00: /* bf/s lab */
ret = handle_unaligned_delayslot(regs);
- if (ret==0)
- regs->pc += (instruction&0x00FF)*2 + 4;
+ if (ret==0) {
+#if defined(__SH4__)
+ if ((regs->sr & 0x00000001) != 0)
+ regs->pc += 4; /* next after slot */
+ else
+#endif
+ regs->pc += SH_PC_8BIT_OFFSET(instruction);
+ }
break;
case 0x0900: /* bt lab - no delayslot */
break;
case 0x0D00: /* bt/s lab */
ret = handle_unaligned_delayslot(regs);
- if (ret==0)
- regs->pc += (instruction&0x00FF)*2 + 4;
+ if (ret==0) {
+#if defined(__SH4__)
+ if ((regs->sr & 0x00000001) == 0)
+ regs->pc += 4; /* next after slot */
+ else
+#endif
+ regs->pc += SH_PC_8BIT_OFFSET(instruction);
+ }
break;
}
break;
@@ -408,14 +447,14 @@
case 0xA000: /* bra label */
ret = handle_unaligned_delayslot(regs);
if (ret==0)
- regs->pc += (instruction&0x0FFF)*2 + 4;
+ regs->pc += SH_PC_12BIT_OFFSET(instruction);
break;
case 0xB000: /* bsr label */
ret = handle_unaligned_delayslot(regs);
if (ret==0) {
regs->pr = regs->pc + 4;
- regs->pc += (instruction&0x0FFF)*2 + 4;
+ regs->pc += SH_PC_12BIT_OFFSET(instruction);
}
break;
}
@@ -539,29 +578,51 @@
: "memory");
}
-void dump_stack(void)
+void show_task(unsigned long *sp)
{
- unsigned long *start;
- unsigned long *end;
- unsigned long *p;
-
- asm("mov r15, %0" : "=r" (start));
- asm("stc r7_bank, %0" : "=r" (end));
- end += 8192/4;
-
- printk("%08lx:%08lx\n", (unsigned long)start, (unsigned long)end);
- for (p=start; p < end; p++) {
- extern long _text, _etext;
- unsigned long v=*p;
-
- if ((v >= (unsigned long )&_text)
- && (v <= (unsigned long )&_etext)) {
- printk("%08lx\n", v);
+ unsigned long *stack, addr;
+ unsigned long module_start = VMALLOC_START;
+ unsigned long module_end = VMALLOC_END;
+ extern long _text, _etext;
+ int i = 1;
+
+ if (!sp) {
+ __asm__ __volatile__ (
+ "mov r15, %0\n\t"
+ "stc r7_bank, %1\n\t"
+ : "=r" (module_start),
+ "=r" (module_end)
+ );
+
+ sp = (unsigned long *)module_start;
+ }
+
+ stack = sp;
+
+ printk("\nCall trace: ");
+
+ while (((long)stack & (THREAD_SIZE - 1))) {
+ if (__get_user(addr, stack)) {
+ printk("Failing address 0x%lx\n", *stack);
+ break;
+ }
+ stack++;
+
+ if (((addr >= (unsigned long)&_text) &&
+ (addr <= (unsigned long)&_etext)) ||
+ ((addr >= module_start) && (addr <= module_end))) {
+ if (i && ((i % 8) == 0))
+ printk("\n ");
+
+ printk("[<%08lx>] ", addr);
+ i++;
}
}
+
+ printk("\n");
}
void show_trace_task(struct task_struct *tsk)
{
- printk("Backtrace not yet implemented for SH.\n");
+ show_task((unsigned long *)tsk->thread.sp);
}
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/lib/checksum.S /usr/src/sh/7751/cvs/linux/arch/sh/lib/checksum.S
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/lib/checksum.S Sat Sep 8 22:29:09 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/lib/checksum.S Mon Oct 15 22:44:53 2001
@@ -1,4 +1,4 @@
-/* $Id: checksum.S,v 1.10 2001/07/06 13:11:32 gniibe Exp $
+/* $Id: checksum.S,v 1.1.1.1 2001/10/15 20:44:53 mrbrown Exp $
*
* INET An implementation of the TCP/IP protocol suite for the LINUX
* operating system. INET is implemented using the BSD Socket
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/lib/memchr.S /usr/src/sh/7751/cvs/linux/arch/sh/lib/memchr.S
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/lib/memchr.S Mon Oct 15 22:36:48 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/lib/memchr.S Mon Oct 15 22:44:53 2001
@@ -1,4 +1,4 @@
-/* $Id: memchr.S,v 1.1 2000/04/14 16:49:01 mjd Exp $
+/* $Id: memchr.S,v 1.1.1.1 2001/10/15 20:44:53 mrbrown Exp $
*
* "memchr" implementation of SuperH
*
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/lib/memcpy.S /usr/src/sh/7751/cvs/linux/arch/sh/lib/memcpy.S
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/lib/memcpy.S Mon Oct 15 22:36:48 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/lib/memcpy.S Mon Oct 15 22:44:53 2001
@@ -1,4 +1,4 @@
-/* $Id: memcpy.S,v 1.3 2001/07/27 11:50:52 gniibe Exp $
+/* $Id: memcpy.S,v 1.1.1.1 2001/10/15 20:44:53 mrbrown Exp $
*
* "memcpy" implementation of SuperH
*
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/lib/memmove.S /usr/src/sh/7751/cvs/linux/arch/sh/lib/memmove.S
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/lib/memmove.S Mon Oct 15 22:36:48 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/lib/memmove.S Mon Oct 15 22:44:53 2001
@@ -1,4 +1,4 @@
-/* $Id: memmove.S,v 1.2 2001/07/27 11:51:09 gniibe Exp $
+/* $Id: memmove.S,v 1.1.1.1 2001/10/15 20:44:53 mrbrown Exp $
*
* "memmove" implementation of SuperH
*
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/lib/memset.S /usr/src/sh/7751/cvs/linux/arch/sh/lib/memset.S
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/lib/memset.S Mon Oct 15 22:36:48 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/lib/memset.S Mon Oct 15 22:44:53 2001
@@ -1,4 +1,4 @@
-/* $Id: memset.S,v 1.1 2000/04/14 16:49:01 mjd Exp $
+/* $Id: memset.S,v 1.1.1.1 2001/10/15 20:44:53 mrbrown Exp $
*
* "memset" implementation of SuperH
*
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/lib/strlen.S /usr/src/sh/7751/cvs/linux/arch/sh/lib/strlen.S
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/lib/strlen.S Sat Sep 8 22:29:09 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/lib/strlen.S Mon Oct 15 22:44:53 2001
@@ -1,4 +1,4 @@
-/* $Id: strlen.S,v 1.2 2001/06/29 14:07:15 gniibe Exp $
+/* $Id: strlen.S,v 1.1.1.1 2001/10/15 20:44:53 mrbrown Exp $
*
* "strlen" implementation of SuperH
*
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/mm/C/1.c /usr/src/sh/7751/cvs/linux/arch/sh/mm/C/1.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/mm/C/1.c Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/arch/sh/mm/C/1.c Tue Jun 4 18:52:15 2002
@@ -0,0 +1,520 @@
+/* $Id: cache-sh4.c,v 1.1.1.1.2.5 2002/04/03 02:33:16 gniibe Exp $
+ *
+ * linux/arch/sh/mm/cache-sh4.c
+ *
+ * Copyright (C) 1999, 2000, 2002 Niibe Yutaka
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define CCR 0xff00001c /* Address of Cache Control Register */
+
+#define CCR_CACHE_OCE 0x0001 /* Operand Cache Enable */
+#define CCR_CACHE_WT 0x0002 /* Write-Through (for P0,U0,P3) (else writeback)*/
+#define CCR_CACHE_CB 0x0004 /* Copy-Back (for P1) (else writethrough) */
+#define CCR_CACHE_OCI 0x0008 /* OC Invalidate */
+#define CCR_CACHE_ORA 0x0020 /* OC RAM Mode */
+#define CCR_CACHE_OIX 0x0080 /* OC Index Enable */
+#define CCR_CACHE_ICE 0x0100 /* Instruction Cache Enable */
+#define CCR_CACHE_ICI 0x0800 /* IC Invalidate */
+#define CCR_CACHE_IIX 0x8000 /* IC Index Enable */
+
+/* Default CCR setup: 8k+16k-byte cache,P1-wb,enable */
+#define CCR_CACHE_VAL (CCR_CACHE_ICE|CCR_CACHE_CB|CCR_CACHE_OCE|0x80000000)
+#define CCR_CACHE_INIT (CCR_CACHE_VAL|CCR_CACHE_OCI|CCR_CACHE_ICI)
+#define CCR_CACHE_ENABLE (CCR_CACHE_OCE|CCR_CACHE_ICE)
+
+#define CACHE_IC_ADDRESS_ARRAY 0xf0000000
+#define CACHE_OC_ADDRESS_ARRAY 0xf4000000
+#define CACHE_VALID 1
+#define CACHE_UPDATED 2
+
+#define CACHE_OC_WAY_SHIFT 13
+#define CACHE_IC_WAY_SHIFT 13
+#define CACHE_OC_ENTRY_SHIFT 5
+#define CACHE_IC_ENTRY_SHIFT 5
+#define CACHE_OC_ENTRY_MASK 0x3fe0
+#define CACHE_OC_ENTRY_PHYS_MASK 0x0fe0
+#define CACHE_IC_ENTRY_MASK 0x1fe0
+#define CACHE_IC_NUM_ENTRIES 512
+#define CACHE_OC_NUM_ENTRIES 1024
+
+static void __init
+detect_cpu_and_cache_system(void)
+{
+#ifdef CONFIG_CPU_SUBTYPE_ST40STB1
+ cpu_data->type = CPU_ST40STB1;
+#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751)
+ cpu_data->type = CPU_SH7750;
+#else
+#error Unknown SH4 CPU type
+#endif
+}
+
+void __init cache_init(void)
+{
+ unsigned long ccr;
+
+ detect_cpu_and_cache_system();
+
+ jump_to_P2();
+ ccr = ctrl_inl(CCR);
+ if (ccr & CCR_CACHE_ENABLE) {
+ /*
+ * XXX: Should check RA here.
+ * If RA was 1, we only need to flush the half of the caches.
+ */
+ unsigned long addr, data;
+
+ for (addr = CACHE_OC_ADDRESS_ARRAY;
+ addr < (CACHE_OC_ADDRESS_ARRAY+
+ (CACHE_OC_NUM_ENTRIES << CACHE_OC_ENTRY_SHIFT));
+ addr += (1 << CACHE_OC_ENTRY_SHIFT)) {
+ data = ctrl_inl(addr);
+ if ((data & (CACHE_UPDATED|CACHE_VALID))
+ == (CACHE_UPDATED|CACHE_VALID))
+ ctrl_outl(data & ~CACHE_UPDATED, addr);
+ }
+ }
+
+ ctrl_outl(CCR_CACHE_INIT, CCR);
+ back_to_P1();
+}
+
+/*
+ * SH-4 has virtually indexed and physically tagged cache.
+ */
+
+static struct semaphore p3map_sem[4];
+
+void __init p3_cache_init(void)
+{
+ /* In ioremap.c */
+ extern int remap_area_pages(unsigned long address,
+ unsigned long phys_addr,
+ unsigned long size, unsigned long flags);
+
+ if (remap_area_pages(P3SEG, 0, PAGE_SIZE*4, _PAGE_CACHABLE))
+ panic("%s failed.", __FUNCTION__);
+ sema_init (&p3map_sem[0], 1);
+ sema_init (&p3map_sem[1], 1);
+ sema_init (&p3map_sem[2], 1);
+ sema_init (&p3map_sem[3], 1);
+}
+
+/*
+ * Write back the dirty D-caches, but not invalidate them.
+ *
+ * START: Virtual Address (U0, P1, or P3)
+ * SIZE: Size of the region.
+ */
+void __flush_wback_region(void *start, int size)
+{
+ unsigned long v;
+ unsigned long begin, end;
+
+ begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
+ end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
+ & ~(L1_CACHE_BYTES-1);
+ for (v = begin; v < end; v+=L1_CACHE_BYTES) {
+ asm volatile("ocbwb %0"
+ : /* no output */
+ : "m" (__m(v)));
+ }
+}
+
+/*
+ * Write back the dirty D-caches and invalidate them.
+ *
+ * START: Virtual Address (U0, P1, or P3)
+ * SIZE: Size of the region.
+ */
+void __flush_purge_region(void *start, int size)
+{
+ unsigned long v;
+ unsigned long begin, end;
+
+ begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
+ end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
+ & ~(L1_CACHE_BYTES-1);
+ for (v = begin; v < end; v+=L1_CACHE_BYTES) {
+ asm volatile("ocbp %0"
+ : /* no output */
+ : "m" (__m(v)));
+ }
+}
+
+
+/*
+ * No write back please
+ */
+void __flush_invalidate_region(void *start, int size)
+{
+ unsigned long v;
+ unsigned long begin, end;
+
+ begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
+ end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
+ & ~(L1_CACHE_BYTES-1);
+ for (v = begin; v < end; v+=L1_CACHE_BYTES) {
+ asm volatile("ocbi %0"
+ : /* no output */
+ : "m" (__m(v)));
+ }
+}
+
+/*
+ * Write back the range of D-cache, and purge the I-cache.
+ *
+ * Called from kernel/module.c:sys_init_module and routine for a.out format.
+ */
+void flush_icache_range(unsigned long start, unsigned long end)
+{
+ flush_cache_all();
+}
+
+/*
+ * Write back the D-cache and purge the I-cache for signal trampoline.
+ */
+void flush_cache_sigtramp(unsigned long addr)
+{
+ unsigned long v, index;
+ unsigned long flags;
+flush_cache_all();
+return;
+
+ v = addr & ~(L1_CACHE_BYTES-1);
+ asm volatile("ocbwb %0"
+ : /* no output */
+ : "m" (__m(v)));
+
+ index = CACHE_IC_ADDRESS_ARRAY| (v&CACHE_IC_ENTRY_MASK);
+ save_and_cli(flags);
+ jump_to_P2();
+ ctrl_outl(0, index); /* Clear out Valid-bit */
+ back_to_P1();
+ restore_flags(flags);
+}
+
+static void flush_cache_4096_all(unsigned long start)
+{
+ unsigned long addr;
+flush_cache_all();
+return;
+ for (addr = start; addr < start + 4096; addr += 32)
+ ctrl_outl(0, addr);
+}
+
+static inline void flush_cache_4096(unsigned long start,
+ unsigned long phys)
+{
+flush_cache_all();
+return;
+ if (start >= CACHE_OC_ADDRESS_ARRAY) {
+ /*
+ * SH7751 and ST40 have no restriction to handle cache.
+ * (While SH7750 must do that at P2 area.)
+ */
+ unsigned long addr, data;
+ for (addr = start; addr < start + 4096; addr += 32) {
+ data = ctrl_inl(addr)&(0x1ffff000|CACHE_VALID);
+ if (data == phys)
+ ctrl_outl(0, addr);
+ }
+ } else
+ {
+ register unsigned long addr __asm__ ("r4");
+ register unsigned long data __asm__ ("r0");
+ register unsigned long __r5 __asm__ ("r5") = phys;
+ register unsigned long __r6 __asm__ ("r6") = (0x1ffff000|CACHE_VALID);
+ register unsigned long __r7 __asm__ ("r7") = 0;
+ extern void __flush_cache_4096(unsigned long, unsigned long);
+
+ asm volatile("jsr @%1; nop"
+ : "=r" (addr), "=r" (data)
+ : "0" (start), "1" (__flush_cache_4096 + 0x20000000),
+ "r" (__r5), "r" (__r6), "r" (__r7)
+ : "pr");
+ }
+}
+
+/*
+ * Write back & invalidate the D-cache of the page.
+ * (To avoid "alias" issues)
+ */
+void flush_dcache_page(struct page *page)
+{
+ if (test_bit(PG_mapped, &page->flags)) {
+ unsigned long phys = PHYSADDR(page_address(page));
+ unsigned long flags;
+
+ phys |= CACHE_VALID;
+
+ save_and_cli(flags);
+
+ /* Loop all the D-cache */
+ flush_cache_4096(CACHE_OC_ADDRESS_ARRAY, phys);
+ flush_cache_4096(CACHE_OC_ADDRESS_ARRAY | 0x1000, phys);
+ flush_cache_4096(CACHE_OC_ADDRESS_ARRAY | 0x2000, phys);
+ flush_cache_4096(CACHE_OC_ADDRESS_ARRAY | 0x3000, phys);
+
+ restore_flags(flags);
+ }
+}
+
+static inline void flush_icache_all(void)
+{
+ unsigned long flags;
+
+ save_and_cli(flags);
+ jump_to_P2();
+ /* Flush I-cache */
+ ctrl_outl(CCR_CACHE_VAL|CCR_CACHE_ICI, CCR);
+ back_to_P1();
+ restore_flags(flags);
+}
+
+void flush_cache_all(void)
+{
+ extern unsigned long empty_zero_page[1024];
+
+ /* Prefetch the data to write back D-cache */
+ unsigned long addr;
+
+ for (addr = (unsigned long)empty_zero_page;
+ addr < (unsigned long)empty_zero_page + 1024*16;
+ addr += L1_CACHE_BYTES)
+ asm volatile("pref @%0"::"r" (addr));
+ flush_icache_all();
+}
+
+void flush_cache_mm(struct mm_struct *mm)
+{
+ /* Is there any good way? */
+ /* XXX: possibly call flush_cache_range for each vm area */
+ /*
+ * FIXME: Really, the optimal solution here would be able to flush out
+ * individual lines created by the specified context, but this isn't
+ * feasible for a number of architectures (such as MIPS, and some
+ * SPARC) .. is this possible for SuperH?
+ *
+ * In the meantime, we'll just flush all of the caches.. this
+ * seems to be the simplest way to avoid at least a few wasted
+ * cache flushes. -Lethal
+ */
+ flush_cache_all();
+}
+
+static void __flush_cache_page(struct vm_area_struct *vma,
+ unsigned long address,
+ unsigned long phys)
+{
+ unsigned long flags;
+flush_cache_all();
+return;
+ phys |= CACHE_VALID;
+ save_and_cli(flags);
+
+ /* We only need to flush D-cache when we have alias */
+ if ((address^phys) & CACHE_ALIAS) {
+ /* Loop 4K of the D-cache */
+ flush_cache_4096(
+ CACHE_OC_ADDRESS_ARRAY | (address & CACHE_ALIAS),
+ phys);
+ /* Loop another 4K of the D-cache */
+ flush_cache_4096(
+ CACHE_OC_ADDRESS_ARRAY | (phys & CACHE_ALIAS),
+ phys);
+ }
+
+ if (vma->vm_flags & VM_EXEC)
+ /* Loop 4K (half) of the I-cache */
+ flush_cache_4096(
+ CACHE_IC_ADDRESS_ARRAY | (address & 0x1000),
+ phys);
+
+ restore_flags(flags);
+}
+
+/*
+ * Write back and invalidate D-caches.
+ *
+ * START, END: Virtual Address (U0 address)
+ *
+ * NOTE: We need to flush the _physical_ page entry.
+ * Flushing the cache lines for U0 only isn't enough.
+ * We need to flush for P1 too, which may contain aliases.
+ */
+void flush_cache_range(struct mm_struct *mm, unsigned long start,
+ unsigned long end)
+{
+ unsigned long p = start & PAGE_MASK;
+ pgd_t *dir;
+ pmd_t *pmd;
+ pte_t *pte;
+ pte_t entry;
+ unsigned long phys;
+ unsigned long d = 0;
+flush_cache_all();
+return;
+
+ dir = pgd_offset(mm, p);
+ pmd = pmd_offset(dir, p);
+
+ do {
+ if (pmd_none(*pmd) || pmd_bad(*pmd)) {
+ p &= ~((1 << PMD_SHIFT) -1);
+ p += (1 << PMD_SHIFT);
+ pmd++;
+ continue;
+ }
+ pte = pte_offset(pmd, p);
+ do {
+ entry = *pte;
+ if ((pte_val(entry) & _PAGE_PRESENT)) {
+ phys = pte_val(entry)&PTE_PHYS_MASK;
+ if ((p^phys) & CACHE_ALIAS) {
+ d |= 1 << ((p & CACHE_ALIAS)>>12);
+ d |= 1 << ((phys & CACHE_ALIAS)>>12);
+ if (d == 0x0f)
+ goto loop_exit;
+ }
+ }
+ pte++;
+ p += PAGE_SIZE;
+ } while (p < end && (unsigned long)pte & PAGE_MASK);
+ pmd++;
+ } while (p < end);
+ loop_exit:
+ if (d & 1)
+ flush_cache_4096_all(CACHE_OC_ADDRESS_ARRAY);
+ if (d & 2)
+ flush_cache_4096_all(CACHE_OC_ADDRESS_ARRAY | 0x1000);
+ if (d & 4)
+ flush_cache_4096_all(CACHE_OC_ADDRESS_ARRAY | 0x2000);
+ if (d & 8)
+ flush_cache_4096_all(CACHE_OC_ADDRESS_ARRAY | 0x3000);
+ flush_icache_all();
+}
+
+/*
+ * Write back and invalidate I/D-caches for the page.
+ *
+ * ADDR: Virtual Address (U0 address)
+ */
+void flush_cache_page(struct vm_area_struct *vma, unsigned long address)
+{
+ pgd_t *dir;
+ pmd_t *pmd;
+ pte_t *pte;
+ pte_t entry;
+ unsigned long phys;
+flush_cache_all();
+return;
+
+ dir = pgd_offset(vma->vm_mm, address);
+ pmd = pmd_offset(dir, address);
+ if (pmd_none(*pmd) || pmd_bad(*pmd))
+ return;
+ pte = pte_offset(pmd, address);
+ entry = *pte;
+ if (!(pte_val(entry) & _PAGE_PRESENT))
+ return;
+
+ phys = pte_val(entry)&PTE_PHYS_MASK;
+ __flush_cache_page(vma, address, phys);
+}
+
+/*
+ * clear_user_page
+ * @to: P1 address
+ * @address: U0 address to be mapped
+ */
+void clear_user_page(void *to, unsigned long address)
+{
+ struct page *page = virt_to_page(to);
+
+ __set_bit(PG_mapped, &page->flags);
+// if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0)
+ clear_page(to);
+#if 0
+ else {
+ pgprot_t pgprot = __pgprot(_PAGE_PRESENT |
+ _PAGE_RW | _PAGE_CACHABLE |
+ _PAGE_DIRTY | _PAGE_ACCESSED |
+ _PAGE_HW_SHARED | _PAGE_FLAGS_HARD);
+ unsigned long phys_addr = PHYSADDR(to);
+ unsigned long p3_addr = P3SEG + (address & CACHE_ALIAS);
+ pgd_t *dir = pgd_offset_k(p3_addr);
+ pmd_t *pmd = pmd_offset(dir, p3_addr);
+ pte_t *pte = pte_offset(pmd, p3_addr);
+ pte_t entry;
+ unsigned long flags;
+
+ entry = mk_pte_phys(phys_addr, pgprot);
+ down(&p3map_sem[(address & CACHE_ALIAS)>>12]);
+ set_pte(pte, entry);
+ save_and_cli(flags);
+ __flush_tlb_page(get_asid(), p3_addr);
+ restore_flags(flags);
+ update_mmu_cache(NULL, p3_addr, entry);
+ __clear_user_page((void *)p3_addr, to);
+ pte_clear(pte);
+ up(&p3map_sem[(address & CACHE_ALIAS)>>12]);
+ }
+#endif
+}
+
+/*
+ * copy_user_page
+ * @to: P1 address
+ * @from: P1 address
+ * @address: U0 address to be mapped
+ */
+void copy_user_page(void *to, void *from, unsigned long address)
+{
+ struct page *page = virt_to_page(to);
+
+ __set_bit(PG_mapped, &page->flags);
+// if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0)
+ copy_page(to, from);
+#if 0
+ else {
+ pgprot_t pgprot = __pgprot(_PAGE_PRESENT |
+ _PAGE_RW | _PAGE_CACHABLE |
+ _PAGE_DIRTY | _PAGE_ACCESSED |
+ _PAGE_HW_SHARED | _PAGE_FLAGS_HARD);
+ unsigned long phys_addr = PHYSADDR(to);
+ unsigned long p3_addr = P3SEG + (address & CACHE_ALIAS);
+ pgd_t *dir = pgd_offset_k(p3_addr);
+ pmd_t *pmd = pmd_offset(dir, p3_addr);
+ pte_t *pte = pte_offset(pmd, p3_addr);
+ pte_t entry;
+ unsigned long flags;
+
+ entry = mk_pte_phys(phys_addr, pgprot);
+ down(&p3map_sem[(address & CACHE_ALIAS)>>12]);
+ set_pte(pte, entry);
+ save_and_cli(flags);
+ __flush_tlb_page(get_asid(), p3_addr);
+ restore_flags(flags);
+ update_mmu_cache(NULL, p3_addr, entry);
+ __copy_user_page((void *)p3_addr, from, to);
+ pte_clear(pte);
+ up(&p3map_sem[(address & CACHE_ALIAS)>>12]);
+ }
+#endif
+}
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/mm/Makefile /usr/src/sh/7751/cvs/linux/arch/sh/mm/Makefile
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/mm/Makefile Sat Sep 8 22:29:09 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/mm/Makefile Fri Mar 29 03:01:07 2002
@@ -11,7 +11,7 @@
obj-y := init.o fault.o extable.o clear_page.o copy_page.o
obj-$(CONFIG_CPU_SH3) += cache-sh3.o
-obj-$(CONFIG_CPU_SH4) += cache-sh4.o __clear_user_page-sh4.o __copy_user_page-sh4.o ioremap.o
+obj-$(CONFIG_CPU_SH4) += cache-sh4.o ioremap.o
USE_STANDARD_AS_RULE := true
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/mm/cache-sh3.c /usr/src/sh/7751/cvs/linux/arch/sh/mm/cache-sh3.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/mm/cache-sh3.c Mon Oct 15 22:36:48 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/mm/cache-sh3.c Mon Oct 15 22:44:53 2001
@@ -1,4 +1,4 @@
-/* $Id: cache-sh3.c,v 1.6 2001/09/10 08:59:59 dwmw2 Exp $
+/* $Id: cache-sh3.c,v 1.1.1.1 2001/10/15 20:44:53 mrbrown Exp $
*
* linux/arch/sh/mm/cache-sh3.c
*
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/mm/cache-sh4.c /usr/src/sh/7751/cvs/linux/arch/sh/mm/cache-sh4.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/mm/cache-sh4.c Mon Oct 15 22:36:48 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/mm/cache-sh4.c Thu Jul 4 21:21:01 2002
@@ -1,9 +1,13 @@
-/* $Id: cache-sh4.c,v 1.16 2001/09/10 11:06:35 dwmw2 Exp $
+#ifdef CONFIG_CPU_SUBTYPE_SH7751
+#define CONFIG_SH_CACHE_ASSOC 1
+#endif
+/* $Id: cache-sh4.c,v 1.1.1.1 2001/10/15 20:44:53 mrbrown Exp $
*
* linux/arch/sh/mm/cache.c
*
* Copyright (C) 1999, 2000 Niibe Yutaka
*
+ * Extensions for 2-way associative cache (e.g. SH7751R) by Antony Bowers, April 2002.
*/
#include
@@ -21,7 +25,7 @@
#include
#include
-#define CCR 0xff00001c /* Address of Cache Control Register */
+#define CCR 0xff00001c /* Address of Cache Control Register */
#define CCR_CACHE_OCE 0x0001 /* Operand Cache Enable */
#define CCR_CACHE_WT 0x0002 /* Write-Through (for P0,U0,P3) (else writeback)*/
@@ -33,33 +37,53 @@
#define CCR_CACHE_ICI 0x0800 /* IC Invalidate */
#define CCR_CACHE_IIX 0x8000 /* IC Index Enable */
-/* Default CCR setup: 8k+16k-byte cache,P1-wb,enable */
-#define CCR_CACHE_VAL (CCR_CACHE_ICE|CCR_CACHE_CB|CCR_CACHE_OCE)
-#define CCR_CACHE_INIT (CCR_CACHE_VAL|CCR_CACHE_OCI|CCR_CACHE_ICI)
+#if defined(CONFIG_SH_CACHE_ASSOC)
+#define CCR_CACHE_EMODE 0x80000000
+#endif
+
#define CCR_CACHE_ENABLE (CCR_CACHE_OCE|CCR_CACHE_ICE)
+#if defined(CONFIG_SH_CACHE_ASSOC)
+/* CCR setup for associative mode: 16k+32k 2-way, P1 copy-back, enable */
+#define CCR_CACHE_VAL (CCR_CACHE_EMODE|CCR_CACHE_ENABLE|CCR_CACHE_CB)
+#else
+/* Default CCR setup: 8k+16k-byte cache, P1-copy-back, enable */
+#define CCR_CACHE_VAL (CCR_CACHE_ENABLE|CCR_CACHE_CB)
+#endif
+
+#define CCR_CACHE_INIT (CCR_CACHE_VAL|CCR_CACHE_OCI|CCR_CACHE_ICI)
+
#define CACHE_IC_ADDRESS_ARRAY 0xf0000000
#define CACHE_OC_ADDRESS_ARRAY 0xf4000000
+
#define CACHE_VALID 1
#define CACHE_UPDATED 2
-#define CACHE_OC_WAY_SHIFT 13
+#define CACHE_OC_WAY_SHIFT 14
#define CACHE_IC_WAY_SHIFT 13
+#define CACHE_OC_WAY_MASK 0x00004000
+#define CACHE_IC_WAY_MASK 0x00002000
+
#define CACHE_OC_ENTRY_SHIFT 5
#define CACHE_IC_ENTRY_SHIFT 5
#define CACHE_OC_ENTRY_MASK 0x3fe0
-#define CACHE_OC_ENTRY_PHYS_MASK 0x0fe0
#define CACHE_IC_ENTRY_MASK 0x1fe0
#define CACHE_IC_NUM_ENTRIES 256
#define CACHE_OC_NUM_ENTRIES 512
+/* For 4k page size, these address bits are unchanged by MMU mapping.
+ */
+#define CACHE_OC_ENTRY_PHYS_MASK 0x0fe0
+
static void __init
detect_cpu_and_cache_system(void)
{
-#ifdef CONFIG_CPU_SUBTYPE_ST40STB1
- cpu_data->type = CPU_ST40STB1;
+#ifdef CONFIG_CPU_SUBTYPE_ST40
+ cpu_data->type = CPU_ST40;
#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751)
cpu_data->type = CPU_SH7750;
+#elif defined(CONFIG_CPU_SUBTYPE_SH7751R)
+ cpu_data->type = CPU_SH7751R;
#else
#error Unknown SH4 CPU type
#endif
@@ -72,7 +96,16 @@
detect_cpu_and_cache_system();
jump_to_P2();
+
+ /* This action is taken if the cache has been enabled by an earlier
+ * phase of the boot process.
+ *
+ * This loop clears the updated (dirty) bit in every cache line that is
+ * both valid and updated. This forces write-back of those lines.
+ */
+
ccr = ctrl_inl(CCR);
+
if (ccr & CCR_CACHE_ENABLE) {
/*
* XXX: Should check RA here.
@@ -80,17 +113,43 @@
*/
unsigned long addr, data;
+#if defined(CONFIG_SH_CACHE_ASSOC)
+ unsigned long way;
+
+ for (way = 0; way <= 1; ++way) {
+ unsigned long waybit = way << CACHE_OC_WAY_SHIFT;
+
+ for (addr = CACHE_OC_ADDRESS_ARRAY + waybit;
+ addr < (CACHE_OC_ADDRESS_ARRAY + waybit +
+ (CACHE_OC_NUM_ENTRIES <<
+ CACHE_OC_ENTRY_SHIFT));
+ addr += (1 << CACHE_OC_ENTRY_SHIFT)) {
+
+ data = ctrl_inl(addr);
+
+ if ((data & (CACHE_UPDATED|CACHE_VALID))
+ == (CACHE_UPDATED|CACHE_VALID))
+ ctrl_outl(data & ~CACHE_UPDATED, addr);
+ }
+ }
+
+#else
for (addr = CACHE_OC_ADDRESS_ARRAY;
addr < (CACHE_OC_ADDRESS_ARRAY+
(CACHE_OC_NUM_ENTRIES << CACHE_OC_ENTRY_SHIFT));
addr += (1 << CACHE_OC_ENTRY_SHIFT)) {
+
data = ctrl_inl(addr);
+
if ((data & (CACHE_UPDATED|CACHE_VALID))
== (CACHE_UPDATED|CACHE_VALID))
ctrl_outl(data & ~CACHE_UPDATED, addr);
}
+#endif
}
+ /* Invalidate, set cache mode, and enable both IC and OC
+ */
ctrl_outl(CCR_CACHE_INIT, CCR);
back_to_P1();
}
@@ -109,7 +168,8 @@
unsigned long size, unsigned long flags);
if (remap_area_pages(P3SEG, 0, PAGE_SIZE*4, _PAGE_CACHABLE))
- panic("p3_cachie_init failed.");
+ panic("p3_cache_init failed.");
+
sema_init (&p3map_sem[0], 1);
sema_init (&p3map_sem[1], 1);
sema_init (&p3map_sem[2], 1);
@@ -160,7 +220,7 @@
/*
- * No write back please
+ * No write back please, just invalidate
*/
void __flush_invalidate_region(void *start, int size)
{
@@ -196,14 +256,34 @@
unsigned long flags;
v = addr & ~(L1_CACHE_BYTES-1);
+
asm volatile("ocbwb %0"
: /* no output */
: "m" (__m(v)));
- index = CACHE_IC_ADDRESS_ARRAY| (v&CACHE_IC_ENTRY_MASK);
+/* The code below invalidates the IC line with the given index, regardless
+ * of whether or not the address is a hit. This appears suboptimal because an
+ * associative write would invalidate only under hit, like the ocbwb
+ * instruction does for the OC.
+ *
+ * However, an associative write simply does nothing if the address causes a
+ * TLB miss, and is therefore unsafe. It could only be used if there was some
+ * way to force the appropriate entry to be in the TLB in advance.
+ *
+ * AB
+ */
+ index = CACHE_IC_ADDRESS_ARRAY | (v & CACHE_IC_ENTRY_MASK);
+
save_and_cli(flags);
jump_to_P2();
+
ctrl_outl(0, index); /* Clear out Valid-bit */
+
+#if defined(CONFIG_SH_CACHE_ASSOC)
+ /* Must invalidate both ways for associative cache */
+ ctrl_outl(0, index | (1 << CACHE_IC_WAY_SHIFT));
+#endif
+
back_to_P1();
restore_flags(flags);
}
@@ -216,21 +296,52 @@
unsigned long addr, data;
unsigned long flags;
+#if defined(CONFIG_SH_CACHE_ASSOC)
+ unsigned int way;
+#endif
+
phys |= CACHE_VALID;
+/* Here, phys is the physical address of the page. We check all the tags in
+ * the cache for those with the same page number as this page (by masking off
+ * the lowest 2 bits of the 19-bit tag; these bits are derived from the offset
+ * within in the 4k page). Matching valid entries are invalidated.
+ *
+ * Since 2 bits of the cache index are derived from the virtual page number,
+ * knowing this would reduce the number of cache entries to be searched by a
+ * factor of 4. However this function exists to deal with potential cache
+ * aliasing, therefore the optimisation is probably not possible.
+ */
save_and_cli(flags);
jump_to_P2();
/* Loop all the D-cache */
for (addr = CACHE_OC_ADDRESS_ARRAY;
addr < (CACHE_OC_ADDRESS_ARRAY
- +(CACHE_OC_NUM_ENTRIES<< CACHE_OC_ENTRY_SHIFT));
- addr += (1<vm_flags & VM_EXEC)
+ if (vma->vm_flags & VM_EXEC) {
+
+#if defined(CONFIG_SH_CACHE_ASSOC)
+ unsigned long way;
+
+ /* Check both ways of associative cache */
+
+ for (way = 0; way <= 1; ++way) {
+ unsigned long waybit = way << CACHE_OC_WAY_SHIFT;
+
+ /* Loop 4K of the I-cache */
+ for (addr = CACHE_IC_ADDRESS_ARRAY +
+ (address & 0x1000) + waybit;
+ addr < (CACHE_IC_ADDRESS_ARRAY +
+ (address & 0x1000) + waybit +
+ (CACHE_LINES_PER_PAGE << CACHE_IC_ENTRY_SHIFT));
+ addr += (1 << CACHE_IC_ENTRY_SHIFT)) {
+ data = ctrl_inl(addr) & (0x1ffff000 | CACHE_VALID);
+ if (data == phys)
+ ctrl_outl(0, addr);
+ }
+ }
+#else
/* Loop 4K of the I-cache */
for (addr = CACHE_IC_ADDRESS_ARRAY|(address&0x1000);
addr < ((CACHE_IC_ADDRESS_ARRAY|(address&0x1000))
@@ -369,6 +599,9 @@
if (data == phys)
ctrl_outl(0, addr);
}
+#endif
+ }
+
back_to_P1();
restore_flags(flags);
}
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/mm/clear_page.S /usr/src/sh/7751/cvs/linux/arch/sh/mm/clear_page.S
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/mm/clear_page.S Sat Sep 8 22:29:09 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/mm/clear_page.S Tue Jun 4 20:17:08 2002
@@ -1,10 +1,13 @@
-/* $Id: clear_page.S,v 1.1 2001/07/23 10:08:50 gniibe Exp $
+/* $Id: clear_page.S,v 1.1.1.1.2.3 2002/04/13 02:35:20 sugioka Exp $
*
- * clear_page implementation of SuperH
+ * __clear_user_page, __clear_user, clear_page implementation of SuperH
*
- * Copyright (C) 2001 Niibe Yutaka & Kaz Kojima
+ * Copyright (C) 2001 Kaz Kojima
+ * Copyright (C) 2001, 2002 Niibe Yutaka
*
*/
+#include
+#include
/*
* clear_page
@@ -18,7 +21,6 @@
* r4 --- to
* r5 --- to + 4096
*/
-#include
ENTRY(clear_page)
mov r4,r5
mov.w .Llimit,r0
@@ -50,3 +52,189 @@
rts
nop
.Llimit: .word (4096-28)
+
+ENTRY(__clear_user)
+ !
+ mov #0, r0
+ mov #0xe0, r1 ! 0xffffffe0
+ !
+ ! r4..(r4+31)&~32 -------- not aligned [ Area 0 ]
+ ! (r4+31)&~32..(r4+r5)&~32 -------- aligned [ Area 1 ]
+ ! (r4+r5)&~32..r4+r5 -------- not aligned [ Area 2 ]
+ !
+ ! Clear area 0
+ mov r4, r2
+ add #31, r2
+ and r1, r2
+ cmp/eq r4, r2
+ bt area1
+ mov r2, r3
+ sub r4, r3
+ mov r3, r7
+ mov r4, r2
+ !
+l0: dt r3
+0: mov.b r0, @r2
+ bf/s l0
+ add #1, r2
+ !
+ sub r7, r5
+ mov r2, r4
+area1:
+ mov r4, r3
+ add r5, r3
+ and r1, r3
+ cmp/hi r2, r3
+ bf area2
+ !
+ ! Clear area 1
+#if defined(__SH4__)
+1: movca.l r0, @r2
+#else
+1: mov.l r0, @r2
+#endif
+ add #4, r2
+2: mov.l r0, @r2
+ add #4, r2
+3: mov.l r0, @r2
+ add #4, r2
+4: mov.l r0, @r2
+ add #4, r2
+5: mov.l r0, @r2
+ add #4, r2
+6: mov.l r0, @r2
+ add #4, r2
+7: mov.l r0, @r2
+ add #4, r2
+8: mov.l r0, @r2
+ add #4, r2
+ cmp/hi r2, r3
+ bt/s 1b
+ nop
+ !
+ ! Clear area 2
+area2:
+ mov r4, r3
+ add r5, r3
+ cmp/hs r2, r3
+ bt/s done
+ sub r2, r3
+l2: dt r3
+9: mov.b r0, @r2
+ bf/s l2
+ add #1, r2
+ !
+done: rts
+ mov #0, r0 ! return 0 as normal return
+
+ ! return the number of bytes remained
+bad_clear_user:
+ mov r4, r0
+ add r5, r0
+ rts
+ sub r2, r0
+
+.section __ex_table,"a"
+ .align 2
+ .long 0b, bad_clear_user
+ .long 1b, bad_clear_user
+ .long 2b, bad_clear_user
+ .long 3b, bad_clear_user
+ .long 4b, bad_clear_user
+ .long 5b, bad_clear_user
+ .long 6b, bad_clear_user
+ .long 7b, bad_clear_user
+ .long 8b, bad_clear_user
+ .long 9b, bad_clear_user
+.previous
+
+#if defined(__SH4__)
+/*
+ * __clear_user_page
+ * @to: P1 address (with same color)
+ * @orig_to: P1 address
+ *
+ * void __clear_user_page(void *to, void *orig_to)
+ */
+
+/*
+ * r0 --- scratch
+ * r4 --- to
+ * r5 --- orig_to
+ * r6 --- to + 4096
+ */
+ENTRY(__clear_user_page)
+ mov.w .L4096,r0
+ mov r4,r6
+ add r0,r6
+ mov #0,r0
+ !
+1: ocbi @r5
+ add #32,r5
+ movca.l r0,@r4
+ mov r4,r1
+ add #32,r4
+ mov.l r0,@-r4
+ mov.l r0,@-r4
+ mov.l r0,@-r4
+ mov.l r0,@-r4
+ mov.l r0,@-r4
+ mov.l r0,@-r4
+ mov.l r0,@-r4
+ add #28,r4
+ cmp/eq r6,r4
+ bf/s 1b
+ ocbwb @r1
+ !
+ rts
+ nop
+.L4096: .word 4096
+
+ENTRY(__flush_cache_4096)
+ .rept 128
+ mov.l @r4,r0
+ and r6,r0
+ cmp/eq r5,r0
+ bf 1f
+ mov.l r7,@r4
+1: add #32,r4
+ .endr
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ rts
+ nop
+
+#if defined(CONFIG_CPU_SUBTYPE_SH7750)
+ENTRY(__flush_cache_4096_all)
+ mov r4,r5
+ mov r4,r6
+ mov r4,r7
+ add #32,r5
+ add #-64,r6
+ add #-32,r7
+ .rept 32
+ mov.l r0,@r4
+ add r1,r6
+ mov.l r0,@r5
+ add r1,r7
+ mov.l r0,@r6
+ add r1,r4
+ mov.l r0,@r7
+ add r1,r5
+ .endr
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ rts
+ nop
+#endif
+#endif
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/mm/copy_page.S /usr/src/sh/7751/cvs/linux/arch/sh/mm/copy_page.S
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/mm/copy_page.S Sat Sep 8 22:29:09 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/mm/copy_page.S Tue Jun 4 20:13:36 2002
@@ -1,10 +1,12 @@
-/* $Id: copy_page.S,v 1.2 2001/07/23 10:27:25 gniibe Exp $
+/* $Id: copy_page.S,v 1.5 2002/04/25 07:21:04 sugioka Exp $
*
- * copy_page implementation of SuperH
+ * copy_page, __copy_user_page, __copy_user implementation of SuperH
*
* Copyright (C) 2001 Niibe Yutaka & Kaz Kojima
+ * Copyright (C) 2002 Toshinobu Sugioka
*
*/
+#include
/*
* copy_page
@@ -21,7 +23,6 @@
* r10 --- to
* r11 --- from
*/
-#include
ENTRY(copy_page)
mov.l r8,@-r15
mov.l r10,@-r15
@@ -66,4 +67,331 @@
mov.l @r15+,r8
rts
nop
+
+#if defined(__SH4__)
+/*
+ * __copy_user_page
+ * @to: P1 address (with same color)
+ * @from: P1 address
+ * @orig_to: P1 address
+ *
+ * void __copy_user_page(void *to, void *from, void *orig_to)
+ */
+
+/*
+ * r0, r1, r2, r3, r4, r5, r6, r7 --- scratch
+ * r8 --- from + 4096
+ * r9 --- orig_to
+ * r10 --- to
+ * r11 --- from
+ */
+ENTRY(__copy_user_page)
+ mov.l r8,@-r15
+ mov.l r9,@-r15
+ mov.l r10,@-r15
+ mov.l r11,@-r15
+ mov r4,r10
+ mov r5,r11
+ mov r6,r9
+ mov r5,r8
+ mov.w .L4096,r0
+ add r0,r8
+ !
+1: ocbi @r9
+ add #32,r9
+ mov.l @r11+,r0
+ mov.l @r11+,r1
+ mov.l @r11+,r2
+ mov.l @r11+,r3
+ mov.l @r11+,r4
+ mov.l @r11+,r5
+ mov.l @r11+,r6
+ mov.l @r11+,r7
+ movca.l r0,@r10
+ mov r10,r0
+ add #32,r10
+ mov.l r7,@-r10
+ mov.l r6,@-r10
+ mov.l r5,@-r10
+ mov.l r4,@-r10
+ mov.l r3,@-r10
+ mov.l r2,@-r10
+ mov.l r1,@-r10
+ ocbwb @r0
+ cmp/eq r11,r8
+ bf/s 1b
+ add #28,r10
+ !
+ mov.l @r15+,r11
+ mov.l @r15+,r10
+ mov.l @r15+,r9
+ mov.l @r15+,r8
+ rts
+ nop
+#endif
.L4096: .word 4096
+/*
+ * __kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n);
+ * Return the number of bytes NOT copied
+ */
+#define EX(...) \
+ 9999: __VA_ARGS__ ; \
+ .section __ex_table, "a"; \
+ .long 9999b, 6000f ; \
+ .previous
+ENTRY(__copy_user)
+ tst r6,r6 ! Check explicitly for zero
+ bf 1f
+ rts
+ mov #0,r0 ! normal return
+1:
+ mov.l r10,@-r15
+ mov.l r9,@-r15
+ mov.l r8,@-r15
+ mov r4,r3
+ add r6,r3 ! last destination address
+ mov #12,r0 ! Check if small number of bytes
+ cmp/gt r0,r6
+ bt 2f
+ bra .L_cleanup_loop
+ nop
+2:
+ neg r5,r0 ! Calculate bytes needed to align source
+ add #4,r0
+ and #3,r0
+ tst r0,r0
+ bt .L_jump
+ mov r0,r1
+
+.L_loop1:
+ ! Copy bytes to align source
+EX( mov.b @r5+,r0 )
+ dt r1
+EX( mov.b r0,@r4 )
+ add #-1,r6
+ bf/s .L_loop1
+ add #1,r4
+
+.L_jump:
+ mov r6,r2 ! Calculate number of longwords to copy
+ shlr2 r2
+ tst r2,r2
+ bt .L_cleanup
+
+ mov r4,r0 ! Jump to appropriate routine
+ and #3,r0
+ mov r0,r1
+ shll2 r1
+ mova .L_jump_tbl,r0
+ mov.l @(r0,r1),r1
+ jmp @r1
+ nop
+
+ .align 2
+.L_jump_tbl:
+ .long .L_dest00
+ .long .L_dest01
+ .long .L_dest10
+ .long .L_dest11
+
+! Destination = 00
+
+.L_dest00:
+ mov r2,r7
+ shlr2 r7
+ shlr r7
+ tst r7,r7
+ mov #7,r0
+ bt/s 1f
+ and r0,r2
+ .align 2
+2:
+EX( mov.l @r5+,r0 )
+EX( mov.l @r5+,r8 )
+EX( mov.l @r5+,r9 )
+EX( mov.l @r5+,r10 )
+EX( mov.l r0,@r4 )
+EX( mov.l r8,@(4,r4) )
+EX( mov.l r9,@(8,r4) )
+EX( mov.l r10,@(12,r4) )
+EX( mov.l @r5+,r0 )
+EX( mov.l @r5+,r8 )
+EX( mov.l @r5+,r9 )
+EX( mov.l @r5+,r10 )
+ dt r7
+EX( mov.l r0,@(16,r4) )
+EX( mov.l r8,@(20,r4) )
+EX( mov.l r9,@(24,r4) )
+EX( mov.l r10,@(28,r4) )
+ bf/s 2b
+ add #32,r4
+ tst r2,r2
+ bt .L_cleanup
+1:
+ mov.l @r5+,r0
+ dt r2
+ mov.l r0,@r4
+ bf/s 1b
+ add #4,r4
+
+ bra .L_cleanup
+ nop
+
+! Destination = 10
+
+.L_dest10:
+ mov r2,r7
+ shlr2 r7
+ shlr r7
+ tst r7,r7
+ mov #7,r0
+ bt/s 1f
+ and r0,r2
+2:
+ dt r7
+#ifdef __LITTLE_ENDIAN__
+EX( mov.l @r5+,r0 )
+EX( mov.l @r5+,r1 )
+EX( mov.l @r5+,r8 )
+EX( mov.l @r5+,r9 )
+EX( mov.l @r5+,r10 )
+EX( mov.w r0,@r4 )
+ add #2,r4
+ xtrct r1,r0
+ xtrct r8,r1
+ xtrct r9,r8
+ xtrct r10,r9
+
+EX( mov.l r0,@r4 )
+EX( mov.l r1,@(4,r4) )
+EX( mov.l r8,@(8,r4) )
+EX( mov.l r9,@(12,r4) )
+
+EX( mov.l @r5+,r1 )
+EX( mov.l @r5+,r8 )
+EX( mov.l @r5+,r0 )
+ xtrct r1,r10
+ xtrct r8,r1
+ xtrct r0,r8
+ shlr16 r0
+EX( mov.l r10,@(16,r4) )
+EX( mov.l r1,@(20,r4) )
+EX( mov.l r8,@(24,r4) )
+EX( mov.w r0,@(28,r4) )
+ bf/s 2b
+ add #30,r4
+#else
+EX( mov.l @(28,r5),r0 )
+EX( mov.l @(24,r5),r8 )
+EX( mov.l @(20,r5),r9 )
+EX( mov.l @(16,r5),r10 )
+EX( mov.w r0,@(30,r4) )
+ add #-2,r4
+ xtrct r8,r0
+ xtrct r9,r8
+ xtrct r10,r9
+EX( mov.l r0,@(28,r4) )
+EX( mov.l r8,@(24,r4) )
+EX( mov.l r9,@(20,r4) )
+
+EX( mov.l @(12,r5),r0 )
+EX( mov.l @(8,r5),r8 )
+ xtrct r0,r10
+EX( mov.l @(4,r5),r9 )
+ mov.l r10,@(16,r4)
+EX( mov.l @r5,r10 )
+ xtrct r8,r0
+ xtrct r9,r8
+ xtrct r10,r9
+EX( mov.l r0,@(12,r4) )
+EX( mov.l r8,@(8,r4) )
+ swap.w r10,r0
+EX( mov.l r9,@(4,r4) )
+EX( mov.w r0,@(2,r4) )
+
+ add #32,r5
+ bf/s 2b
+ add #34,r4
+#endif
+ tst r2,r2
+ bt .L_cleanup
+
+1: ! Read longword, write two words per iteration
+EX( mov.l @r5+,r0 )
+ dt r2
+#ifdef __LITTLE_ENDIAN__
+EX( mov.w r0,@r4 )
+ shlr16 r0
+EX( mov.w r0,@(2,r4) )
+#else
+EX( mov.w r0,@(2,r4) )
+ shlr16 r0
+EX( mov.w r0,@r4 )
+#endif
+ bf/s 1b
+ add #4,r4
+
+ bra .L_cleanup
+ nop
+
+! Destination = 01 or 11
+
+.L_dest01:
+.L_dest11:
+ ! Read longword, write byte, word, byte per iteration
+EX( mov.l @r5+,r0 )
+ dt r2
+#ifdef __LITTLE_ENDIAN__
+EX( mov.b r0,@r4 )
+ shlr8 r0
+ add #1,r4
+EX( mov.w r0,@r4 )
+ shlr16 r0
+EX( mov.b r0,@(2,r4) )
+ bf/s .L_dest01
+ add #3,r4
+#else
+EX( mov.b r0,@(3,r4) )
+ shlr8 r0
+ swap.w r0,r7
+EX( mov.b r7,@r4 )
+ add #1,r4
+EX( mov.w r0,@r4 )
+ bf/s .L_dest01
+ add #3,r4
+#endif
+
+! Cleanup last few bytes
+.L_cleanup:
+ mov r6,r0
+ and #3,r0
+ tst r0,r0
+ bt .L_exit
+ mov r0,r6
+
+.L_cleanup_loop:
+EX( mov.b @r5+,r0 )
+ dt r6
+EX( mov.b r0,@r4 )
+ bf/s .L_cleanup_loop
+ add #1,r4
+
+.L_exit:
+ mov #0,r0 ! normal return
+5000:
+
+# Exception handler:
+.section .fixup, "ax"
+6000:
+ mov.l 8000f,r1
+ mov r3,r0
+ jmp @r1
+ sub r4,r0
+ .align 2
+8000: .long 5000b
+
+.previous
+ mov.l @r15+,r8
+ mov.l @r15+,r9
+ rts
+ mov.l @r15+,r10
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/mm/extable.c /usr/src/sh/7751/cvs/linux/arch/sh/mm/extable.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/mm/extable.c Sat Sep 8 22:29:09 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/mm/extable.c Mon Oct 15 22:44:53 2001
@@ -1,4 +1,4 @@
-/* $Id: extable.c,v 1.2 2001/03/31 10:43:18 gniibe Exp $
+/* $Id: extable.c,v 1.1.1.1 2001/10/15 20:44:53 mrbrown Exp $
*
* linux/arch/sh/mm/extable.c
* Taken from:
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/mm/fault.c /usr/src/sh/7751/cvs/linux/arch/sh/mm/fault.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/mm/fault.c Mon Oct 15 22:36:48 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/mm/fault.c Fri May 10 20:58:55 2002
@@ -1,4 +1,4 @@
-/* $Id: fault.c,v 1.49 2001/10/06 19:46:00 lethal Exp $
+/* $Id: fault.c,v 1.1.1.1.2.2 2002/05/10 17:58:55 jzs Exp $
*
* linux/arch/sh/mm/fault.c
* Copyright (C) 1999 Niibe Yutaka
@@ -27,6 +27,10 @@
#include
#include
+#if defined(CONFIG_SH_KGDB)
+#include
+#endif
+
extern void die(const char *,struct pt_regs *,long);
/*
@@ -95,6 +99,11 @@
unsigned long page;
unsigned long fixup;
+#if defined(CONFIG_SH_KGDB)
+ if (kgdb_nofault && kgdb_bus_err_hook)
+ kgdb_bus_err_hook();
+#endif
+
tsk = current;
mm = tsk->mm;
@@ -245,9 +254,15 @@
pte_t *pte;
pte_t entry;
+#if defined(CONFIG_SH_KGDB)
+ if (kgdb_nofault && kgdb_bus_err_hook)
+ kgdb_bus_err_hook();
+#endif
if (address >= P3SEG && address < P4SEG)
dir = pgd_offset_k(address);
else if (address >= TASK_SIZE)
+ return 1;
+ else if (!current->mm)
return 1;
else
dir = pgd_offset(current->mm, address);
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/mm/init.c /usr/src/sh/7751/cvs/linux/arch/sh/mm/init.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/mm/init.c Mon Oct 15 22:36:48 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/mm/init.c Mon Oct 15 22:44:54 2001
@@ -1,4 +1,4 @@
-/* $Id: init.c,v 1.19 2001/10/01 02:21:50 gniibe Exp $
+/* $Id: init.c,v 1.1.1.1 2001/10/15 20:44:54 mrbrown Exp $
*
* linux/arch/sh/mm/init.c
*
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/mm/ioremap.c /usr/src/sh/7751/cvs/linux/arch/sh/mm/ioremap.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/mm/ioremap.c Sat Sep 8 22:29:09 2001
+++ /usr/src/sh/7751/cvs/linux/arch/sh/mm/ioremap.c Mon Oct 15 22:44:54 2001
@@ -1,4 +1,4 @@
-/* $Id: ioremap.c,v 1.4 2001/06/30 09:18:39 gniibe Exp $
+/* $Id: ioremap.c,v 1.1.1.1 2001/10/15 20:44:54 mrbrown Exp $
*
* arch/sh/mm/ioremap.c
*
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/Makefile /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/Makefile
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/Makefile Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/Makefile Mon Oct 15 22:44:54 2001
@@ -0,0 +1,20 @@
+#
+# Makefile for the STMicroelectronics Overdrive specific parts of the kernel
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+all: overdrive.o
+
+clean:
+
+O_TARGET := overdrive.o
+obj-y := mach.o setup.o io.o led.o
+
+ifneq ($(CONFIG_SH_GENERIC)$(CONFIG_SH_7750_OVERDRIVE),)
+obj-$(CONFIG_PCI) += irq.o fpga.o galileo.o
+endif
+
+include $(TOPDIR)/Rules.make
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/fpga.c /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/fpga.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/fpga.c Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/fpga.c Mon Oct 15 22:44:54 2001
@@ -0,0 +1,134 @@
+/*
+ * Copyright (C) 2000 David J. Mckay (david.mckay@st.com)
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License. See linux/COPYING for more information.
+ *
+ * This file handles programming up the Altera Flex10K that interfaces to
+ * the Galileo, and does the PS/2 keyboard and mouse
+ *
+ */
+
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+#include "gt64111.h"
+#include "overdrive.h"
+#include "fpga.h"
+
+#define FPGA_NotConfigHigh() (*FPGA_ControlReg) = (*FPGA_ControlReg) | ENABLE_FPGA_BIT
+#define FPGA_NotConfigLow() (*FPGA_ControlReg) = (*FPGA_ControlReg) & RESET_FPGA_MASK
+
+/* I need to find out what (if any) the real delay factor here is */
+/* The delay is definately not critical */
+#define long_delay() {int i;for(i=0;i<10000;i++);}
+#define short_delay() {int i;for(i=0;i<100;i++);}
+
+static void __init program_overdrive_fpga(const unsigned char *fpgacode,
+ int size)
+{
+ int timeout = 0;
+ int i, j;
+ unsigned char b;
+ static volatile unsigned char *FPGA_ControlReg =
+ (volatile unsigned char *) (OVERDRIVE_CTRL);
+ static volatile unsigned char *FPGA_ProgramReg =
+ (volatile unsigned char *) (FPGA_DCLK_ADDRESS);
+
+ printk("FPGA: Commencing FPGA Programming\n");
+
+ /* The PCI reset but MUST be low when programming the FPGA !!! */
+ b = (*FPGA_ControlReg) & RESET_PCI_MASK;
+
+ (*FPGA_ControlReg) = b;
+
+ /* Prepare FPGA to program */
+
+ FPGA_NotConfigHigh();
+ long_delay();
+
+ FPGA_NotConfigLow();
+ short_delay();
+
+ while ((*FPGA_ProgramReg & FPGA_NOT_STATUS) != 0) {
+ printk("FPGA: Waiting for NotStatus to go Low ... \n");
+ }
+
+ FPGA_NotConfigHigh();
+
+ /* Wait for FPGA "ready to be programmed" signal */
+ printk("FPGA: Waiting for NotStatus to go high (FPGA ready)... \n");
+
+ for (timeout = 0;
+ (((*FPGA_ProgramReg & FPGA_NOT_STATUS) == 0)
+ && (timeout < FPGA_TIMEOUT)); timeout++);
+
+ /* Check if timeout condition occured - i.e. an error */
+
+ if (timeout == FPGA_TIMEOUT) {
+ printk
+ ("FPGA: Failed to program - Timeout waiting for notSTATUS to go high\n");
+ return;
+ }
+
+ printk("FPGA: Copying data to FPGA ... %d bytes\n", size);
+
+ /* Copy array to FPGA - bit at a time */
+
+ for (i = 0; i < size; i++) {
+ volatile unsigned w = 0;
+
+ for (j = 0; j < 8; j++) {
+ *FPGA_ProgramReg = (fpgacode[i] >> j) & 0x01;
+ short_delay();
+ }
+ if ((i & 0x3ff) == 0) {
+ printk(".");
+ }
+ }
+
+ /* Waiting for CONFDONE to go high - means the program is complete */
+
+ for (timeout = 0;
+ (((*FPGA_ProgramReg & FPGA_CONFDONE) == 0)
+ && (timeout < FPGA_TIMEOUT)); timeout++) {
+
+ *FPGA_ProgramReg = 0x0;
+ long_delay();
+ }
+
+ if (timeout == FPGA_TIMEOUT) {
+ printk
+ ("FPGA: Failed to program - Timeout waiting for CONFDONE to go high\n");
+ return;
+ } else { /* Clock another 10 times - gets the device into a working state */
+ for (i = 0; i < 10; i++) {
+ *FPGA_ProgramReg = 0x0;
+ short_delay();
+ }
+ }
+
+ printk("FPGA: Programming complete\n");
+}
+
+
+static const unsigned char __init fpgacode[] = {
+#include "./overdrive.ttf" /* Code from maxplus2 compiler */
+ , 0, 0
+};
+
+
+int __init init_overdrive_fpga(void)
+{
+ program_overdrive_fpga(fpgacode, sizeof(fpgacode));
+
+ return 0;
+}
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/fpga.h /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/fpga.h
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/fpga.h Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/fpga.h Mon Oct 15 22:44:54 2001
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2000 David J. Mckay (david.mckay@st.com)
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License. See linux/COPYING for more information.
+ *
+ */
+
+#ifndef __FPGA_OD_H__
+#define __FPGA_OD_H__
+
+/* This routine will program up the fpga which interfaces to the galileo */
+int init_overdrive_fpga(void);
+
+#endif
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/galileo.c /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/galileo.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/galileo.c Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/galileo.c Mon Oct 15 22:44:54 2001
@@ -0,0 +1,594 @@
+/*
+ * Copyright (C) 2000 David J. Mckay (david.mckay@st.com)
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License. See linux/COPYING for more information.
+ *
+ * This file contains the PCI routines required for the Galileo GT6411
+ * PCI bridge as used on the Orion and Overdrive boards.
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "overdrive.h"
+#include "gt64111.h"
+
+
+/* After boot, we shift the Galileo registers so that they appear
+ * in BANK6, along with IO space. This means we can have one contingous
+ * lump of PCI address space without these registers appearing in the
+ * middle of them
+ */
+
+#define GT64111_BASE_ADDRESS 0xbb000000
+#define GT64111_IO_BASE_ADDRESS 0x1000
+/* The GT64111 registers appear at this address to the SH4 after reset */
+#define RESET_GT64111_BASE_ADDRESS 0xb4000000
+
+/* Macros used to access the Galileo registers */
+#define RESET_GT64111_REG(x) (RESET_GT64111_BASE_ADDRESS+x)
+#define GT64111_REG(x) (GT64111_BASE_ADDRESS+x)
+
+#define RESET_GT_WRITE(x,v) writel((v),RESET_GT64111_REG(x))
+
+#define RESET_GT_READ(x) readl(RESET_GT64111_REG(x))
+
+#define GT_WRITE(x,v) writel((v),GT64111_REG(x))
+#define GT_WRITE_BYTE(x,v) writeb((v),GT64111_REG(x))
+#define GT_WRITE_SHORT(x,v) writew((v),GT64111_REG(x))
+
+#define GT_READ(x) readl(GT64111_REG(x))
+#define GT_READ_BYTE(x) readb(GT64111_REG(x))
+#define GT_READ_SHORT(x) readw(GT64111_REG(x))
+
+
+/* Where the various SH banks start at */
+#define SH_BANK4_ADR 0xb0000000
+#define SH_BANK5_ADR 0xb4000000
+#define SH_BANK6_ADR 0xb8000000
+
+/* Masks out everything but lines 28,27,26 */
+#define BANK_SELECT_MASK 0x1c000000
+
+#define SH4_TO_BANK(x) ( (x) & BANK_SELECT_MASK)
+
+/*
+ * Masks used for address conversaion. Bank 6 is used for IO and
+ * has all the address bits zeroed by the FPGA. Special case this
+ */
+#define MEMORY_BANK_MASK 0x1fffffff
+#define IO_BANK_MASK 0x03ffffff
+
+/* Mark bank 6 as the bank used for IO. You can change this in the FPGA code
+ * if you want
+ */
+#define IO_BANK_ADR PCI_GTIO_BASE
+
+/* Will select the correct mask to apply depending on the SH$ address */
+#define SELECT_BANK_MASK(x) \
+ ( (SH4_TO_BANK(x)==SH4_TO_BANK(IO_BANK_ADR)) ? IO_BANK_MASK : MEMORY_BANK_MASK)
+
+/* Converts between PCI space and P2 region */
+#define SH4_TO_PCI(x) ((x)&SELECT_BANK_MASK(x))
+
+/* Various macros for figuring out what to stick in the Galileo registers.
+ * You *really* don't want to figure this stuff out by hand, you always get
+ * it wrong
+ */
+#define GT_MEM_LO_ADR(x) ((((unsigned)((x)&SELECT_BANK_MASK(x)))>>21)&0x7ff)
+#define GT_MEM_HI_ADR(x) ((((unsigned)((x)&SELECT_BANK_MASK(x)))>>21)&0x7f)
+#define GT_MEM_SUB_ADR(x) ((((unsigned)((x)&SELECT_BANK_MASK(x)))>>20)&0xff)
+
+#define PROGRAM_HI_LO(block,a,s) \
+ GT_WRITE(block##_LO_DEC_ADR,GT_MEM_LO_ADR(a));\
+ GT_WRITE(block##_HI_DEC_ADR,GT_MEM_HI_ADR(a+s-1))
+
+#define PROGRAM_SUB_HI_LO(block,a,s) \
+ GT_WRITE(block##_LO_DEC_ADR,GT_MEM_SUB_ADR(a));\
+ GT_WRITE(block##_HI_DEC_ADR,GT_MEM_SUB_ADR(a+s-1))
+
+/* We need to set the size, and the offset register */
+
+#define GT_BAR_MASK(x) ((x)&~0xfff)
+
+/* Macro to set up the BAR in the Galileo. Essentially used for the DRAM */
+#define PROGRAM_GT_BAR(block,a,s) \
+ GT_WRITE(PCI_##block##_BANK_SIZE,GT_BAR_MASK((s-1)));\
+ write_config_to_galileo(PCI_CONFIG_##block##_BASE_ADR,\
+ GT_BAR_MASK(a))
+
+#define DISABLE_GT_BAR(block) \
+ GT_WRITE(PCI_##block##_BANK_SIZE,0),\
+ GT_CONFIG_WRITE(PCI_CONFIG_##block##_BASE_ADR,\
+ 0x80000000)
+
+/* Macros to disable things we are not going to use */
+#define DISABLE_DECODE(x) GT_WRITE(x##_LO_DEC_ADR,0x7ff);\
+ GT_WRITE(x##_HI_DEC_ADR,0x00)
+
+#define DISABLE_SUB_DECODE(x) GT_WRITE(x##_LO_DEC_ADR,0xff);\
+ GT_WRITE(x##_HI_DEC_ADR,0x00)
+
+static void __init reset_pci(void)
+{
+ /* Set RESET_PCI bit high */
+ writeb(readb(OVERDRIVE_CTRL) | ENABLE_PCI_BIT, OVERDRIVE_CTRL);
+ udelay(250);
+
+ /* Set RESET_PCI bit low */
+ writeb(readb(OVERDRIVE_CTRL) & RESET_PCI_MASK, OVERDRIVE_CTRL);
+ udelay(250);
+
+ writeb(readb(OVERDRIVE_CTRL) | ENABLE_PCI_BIT, OVERDRIVE_CTRL);
+ udelay(250);
+}
+
+static int write_config_to_galileo(int where, u32 val);
+#define GT_CONFIG_WRITE(where,val) write_config_to_galileo(where,val)
+
+#define ENABLE_PCI_DRAM
+
+
+#ifdef TEST_DRAM
+/* Test function to check out if the PCI DRAM is working OK */
+static int /* __init */ test_dram(unsigned *base, unsigned size)
+{
+ unsigned *p = base;
+ unsigned *end = (unsigned *) (((unsigned) base) + size);
+ unsigned w;
+
+ for (p = base; p < end; p++) {
+ *p = 0xffffffff;
+ if (*p != 0xffffffff) {
+ printk("AAARGH -write failed!!! at %p is %x\n", p,
+ *p);
+ return 0;
+ }
+ *p = 0x0;
+ if (*p != 0x0) {
+ printk("AAARGH -write failed!!!\n");
+ return 0;
+ }
+ }
+
+ for (p = base; p < end; p++) {
+ *p = (unsigned) p;
+ if (*p != (unsigned) p) {
+ printk("Failed at 0x%p, actually is 0x%x\n", p,
+ *p);
+ return 0;
+ }
+ }
+
+ for (p = base; p < end; p++) {
+ w = ((unsigned) p & 0xffff0000);
+ *p = w | (w >> 16);
+ }
+
+ for (p = base; p < end; p++) {
+ w = ((unsigned) p & 0xffff0000);
+ w |= (w >> 16);
+ if (*p != w) {
+ printk
+ ("Failed at 0x%p, should be 0x%x actually is 0x%x\n",
+ p, w, *p);
+ return 0;
+ }
+ }
+
+ return 1;
+}
+#endif
+
+
+/* Function to set up and initialise the galileo. This sets up the BARS,
+ * maps the DRAM into the address space etc,etc
+ */
+int __init galileo_init(void)
+{
+ reset_pci();
+
+ /* Now shift the galileo regs into this block */
+ RESET_GT_WRITE(INTERNAL_SPACE_DEC,
+ GT_MEM_LO_ADR(GT64111_BASE_ADDRESS));
+
+ /* Should have a sanity check here, that you can read back at the new
+ * address what you just wrote
+ */
+
+ /* Disable decode for all regions */
+ DISABLE_DECODE(RAS10);
+ DISABLE_DECODE(RAS32);
+ DISABLE_DECODE(CS20);
+ DISABLE_DECODE(CS3);
+ DISABLE_DECODE(PCI_IO);
+ DISABLE_DECODE(PCI_MEM0);
+ DISABLE_DECODE(PCI_MEM1);
+
+ /* Disable all BARS */
+ GT_WRITE(BAR_ENABLE_ADR, 0x1ff);
+ DISABLE_GT_BAR(RAS10);
+ DISABLE_GT_BAR(RAS32);
+ DISABLE_GT_BAR(CS20);
+ DISABLE_GT_BAR(CS3);
+
+ /* Tell the BAR where the IO registers now are */
+ GT_CONFIG_WRITE(PCI_CONFIG_INT_REG_IO_ADR,GT_BAR_MASK(
+ (GT64111_IO_BASE_ADDRESS &
+ IO_BANK_MASK)));
+ /* set up a 112 Mb decode */
+ PROGRAM_HI_LO(PCI_MEM0, SH_BANK4_ADR, 112 * 1024 * 1024);
+
+ /* Set up a 32 MB io space decode */
+ PROGRAM_HI_LO(PCI_IO, IO_BANK_ADR, 32 * 1024 * 1024);
+
+#ifdef ENABLE_PCI_DRAM
+ /* Program up the DRAM configuration - there is DRAM only in bank 0 */
+ /* Now set up the DRAM decode */
+ PROGRAM_HI_LO(RAS10, PCI_DRAM_BASE, PCI_DRAM_SIZE);
+ /* And the sub decode */
+ PROGRAM_SUB_HI_LO(RAS0, PCI_DRAM_BASE, PCI_DRAM_SIZE);
+
+ DISABLE_SUB_DECODE(RAS1);
+
+ /* Set refresh rate */
+ GT_WRITE(DRAM_BANK0_PARMS, 0x3f);
+ GT_WRITE(DRAM_CFG, 0x100);
+
+ /* we have to lob off the top bits rememeber!! */
+ PROGRAM_GT_BAR(RAS10, SH4_TO_PCI(PCI_DRAM_BASE), PCI_DRAM_SIZE);
+
+#endif
+
+ /* We are only interested in decoding RAS10 and the Galileo's internal
+ * registers (as IO) on the PCI bus
+ */
+#ifdef ENABLE_PCI_DRAM
+ GT_WRITE(BAR_ENABLE_ADR, (~((1 << 8) | (1 << 3))) & 0x1ff);
+#else
+ GT_WRITE(BAR_ENABLE_ADR, (~(1 << 3)) & 0x1ff);
+#endif
+
+ /* Change the class code to host bridge, it actually powers up
+ * as a memory controller
+ */
+ GT_CONFIG_WRITE(8, 0x06000011);
+
+ /* Allow the galileo to master the PCI bus */
+ GT_CONFIG_WRITE(PCI_COMMAND,
+ PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
+ PCI_COMMAND_IO);
+
+
+#if 0
+ printk("Testing PCI DRAM - ");
+ if(test_dram(PCI_DRAM_BASE,PCI_DRAM_SIZE)) {
+ printk("Passed\n");
+ }else {
+ printk("FAILED\n");
+ }
+#endif
+ return 0;
+
+}
+
+
+#define SET_CONFIG_BITS(bus,devfn,where)\
+ ((1<<31) | ((bus) << 16) | ((devfn) << 8) | ((where) & ~3))
+
+#define CONFIG_CMD(dev, where) SET_CONFIG_BITS((dev)->bus->number,(dev)->devfn,where)
+
+/* This write to the galileo config registers, unlike the functions below, can
+ * be used before the PCI subsystem has started up
+ */
+static int __init write_config_to_galileo(int where, u32 val)
+{
+ GT_WRITE(PCI_CFG_ADR, SET_CONFIG_BITS(0, 0, where));
+
+ GT_WRITE(PCI_CFG_DATA, val);
+ return 0;
+}
+
+/* We exclude the galileo and slot 31, the galileo because I don't know how to stop
+ * the setup code shagging up the setup I have done on it, and 31 because the whole
+ * thing locks up if you try to access that slot (which doesn't exist of course anyway
+ */
+
+#define EXCLUDED_DEV(dev) ((dev->bus->number==0) && ((PCI_SLOT(dev->devfn)==0) || (PCI_SLOT(dev->devfn) == 31)))
+
+static int galileo_read_config_byte(struct pci_dev *dev, int where,
+ u8 * val)
+{
+
+
+ /* I suspect this doesn't work because this drives a special cycle ? */
+ if (EXCLUDED_DEV(dev)) {
+ *val = 0xff;
+ return PCIBIOS_SUCCESSFUL;
+ }
+ /* Start the config cycle */
+ GT_WRITE(PCI_CFG_ADR, CONFIG_CMD(dev, where));
+ /* Read back the result */
+ *val = GT_READ_BYTE(PCI_CFG_DATA + (where & 3));
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+
+static int galileo_read_config_word(struct pci_dev *dev, int where,
+ u16 * val)
+{
+
+ if (EXCLUDED_DEV(dev)) {
+ *val = 0xffff;
+ return PCIBIOS_SUCCESSFUL;
+ }
+
+ GT_WRITE(PCI_CFG_ADR, CONFIG_CMD(dev, where));
+ *val = GT_READ_SHORT(PCI_CFG_DATA + (where & 2));
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+
+static int galileo_read_config_dword(struct pci_dev *dev, int where,
+ u32 * val)
+{
+ if (EXCLUDED_DEV(dev)) {
+ *val = 0xffffffff;
+ return PCIBIOS_SUCCESSFUL;
+ }
+
+ GT_WRITE(PCI_CFG_ADR, CONFIG_CMD(dev, where));
+ *val = GT_READ(PCI_CFG_DATA);
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static int galileo_write_config_byte(struct pci_dev *dev, int where,
+ u8 val)
+{
+ GT_WRITE(PCI_CFG_ADR, CONFIG_CMD(dev, where));
+
+ GT_WRITE_BYTE(PCI_CFG_DATA + (where & 3), val);
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+
+static int galileo_write_config_word(struct pci_dev *dev, int where,
+ u16 val)
+{
+ GT_WRITE(PCI_CFG_ADR, CONFIG_CMD(dev, where));
+
+ GT_WRITE_SHORT(PCI_CFG_DATA + (where & 2), val);
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static int galileo_write_config_dword(struct pci_dev *dev, int where,
+ u32 val)
+{
+ GT_WRITE(PCI_CFG_ADR, CONFIG_CMD(dev, where));
+
+ GT_WRITE(PCI_CFG_DATA, val);
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static struct pci_ops pci_config_ops = {
+ galileo_read_config_byte,
+ galileo_read_config_word,
+ galileo_read_config_dword,
+ galileo_write_config_byte,
+ galileo_write_config_word,
+ galileo_write_config_dword
+};
+
+
+/* Everything hangs off this */
+static struct pci_bus *pci_root_bus;
+
+
+static u8 __init no_swizzle(struct pci_dev *dev, u8 * pin)
+{
+ return PCI_SLOT(dev->devfn);
+}
+
+static int __init map_od_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+ /* Slot 1: Galileo
+ * Slot 2: PCI Slot 1
+ * Slot 3: PCI Slot 2
+ * Slot 4: ESS
+ */
+ switch (slot) {
+ case 2:
+ return OVERDRIVE_PCI_IRQ1;
+ case 3:
+ /* Note this assumes you have a hacked card in slot 2 */
+ return OVERDRIVE_PCI_IRQ2;
+ case 4:
+ return OVERDRIVE_ESS_IRQ;
+ default:
+ /* printk("PCI: Unexpected IRQ mapping request for slot %d\n", slot); */
+ return -1;
+ }
+}
+
+
+
+void __init
+pcibios_fixup_pbus_ranges(struct pci_bus *bus, struct pbus_set_ranges_data *ranges)
+{
+ ranges->io_start -= bus->resource[0]->start;
+ ranges->io_end -= bus->resource[0]->start;
+ ranges->mem_start -= bus->resource[1]->start;
+ ranges->mem_end -= bus->resource[1]->start;
+}
+
+static void __init pci_fixup_ide_bases(struct pci_dev *d)
+{
+ int i;
+
+ /*
+ * PCI IDE controllers use non-standard I/O port decoding, respect it.
+ */
+ if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE)
+ return;
+ printk("PCI: IDE base address fixup for %s\n", d->slot_name);
+ for(i=0; i<4; i++) {
+ struct resource *r = &d->resource[i];
+ if ((r->start & ~0x80) == 0x374) {
+ r->start |= 2;
+ r->end = r->start;
+ }
+ }
+}
+
+
+/* Add future fixups here... */
+struct pci_fixup pcibios_fixups[] = {
+ { PCI_FIXUP_HEADER, PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases },
+ { 0 }
+};
+
+void __init pcibios_init(void)
+{
+ static struct resource galio,galmem;
+
+ /* Allocate the registers used by the Galileo */
+ galio.flags = IORESOURCE_IO;
+ galio.name = "Galileo GT64011";
+ galmem.flags = IORESOURCE_MEM|IORESOURCE_PREFETCH;
+ galmem.name = "Galileo GT64011 DRAM";
+
+ allocate_resource(&ioport_resource, &galio, 256,
+ GT64111_IO_BASE_ADDRESS,GT64111_IO_BASE_ADDRESS+256, 256, NULL, NULL);
+ allocate_resource(&iomem_resource, &galmem,PCI_DRAM_SIZE,
+ PHYSADDR(PCI_DRAM_BASE), PHYSADDR(PCI_DRAM_BASE)+PCI_DRAM_SIZE,
+ PCI_DRAM_SIZE, NULL, NULL);
+
+ /* ok, do the scan man */
+ pci_root_bus = pci_scan_bus(0, &pci_config_ops, NULL);
+
+ pci_assign_unassigned_resources();
+ pci_fixup_irqs(no_swizzle, map_od_irq);
+
+#ifdef TEST_DRAM
+ printk("Testing PCI DRAM - ");
+ if(test_dram(PCI_DRAM_BASE,PCI_DRAM_SIZE)) {
+ printk("Passed\n");
+ }else {
+ printk("FAILED\n");
+ }
+#endif
+
+}
+
+char * __init pcibios_setup(char *str)
+{
+ return str;
+}
+
+
+
+int pcibios_enable_device(struct pci_dev *dev)
+{
+
+ u16 cmd, old_cmd;
+ int idx;
+ struct resource *r;
+
+ pci_read_config_word(dev, PCI_COMMAND, &cmd);
+ old_cmd = cmd;
+ for (idx = 0; idx < 6; idx++) {
+ r = dev->resource + idx;
+ if (!r->start && r->end) {
+ printk(KERN_ERR
+ "PCI: Device %s not available because"
+ " of resource collisions\n",
+ dev->slot_name);
+ return -EINVAL;
+ }
+ if (r->flags & IORESOURCE_IO)
+ cmd |= PCI_COMMAND_IO;
+ if (r->flags & IORESOURCE_MEM)
+ cmd |= PCI_COMMAND_MEMORY;
+ }
+ if (cmd != old_cmd) {
+ printk("PCI: enabling device %s (%04x -> %04x)\n",
+ dev->slot_name, old_cmd, cmd);
+ pci_write_config_word(dev, PCI_COMMAND, cmd);
+ }
+ return 0;
+
+}
+
+/* We should do some optimisation work here I think. Ok for now though */
+void __init pcibios_fixup_bus(struct pci_bus *bus)
+{
+
+}
+
+void pcibios_align_resource(void *data, struct resource *res,
+ unsigned long size)
+{
+}
+
+void __init pcibios_update_resource(struct pci_dev *dev, struct resource *root,
+ struct resource *res, int resource)
+{
+
+ unsigned long where, size;
+ u32 reg;
+
+
+ printk("PCI: Assigning %3s %08lx to %s\n",
+ res->flags & IORESOURCE_IO ? "IO" : "MEM",
+ res->start, dev->name);
+
+ where = PCI_BASE_ADDRESS_0 + resource * 4;
+ size = res->end - res->start;
+
+ pci_read_config_dword(dev, where, ®);
+ reg = (reg & size) | (((u32) (res->start - root->start)) & ~size);
+ pci_write_config_dword(dev, where, reg);
+}
+
+
+void __init pcibios_update_irq(struct pci_dev *dev, int irq)
+{
+ printk("PCI: Assigning IRQ %02d to %s\n", irq, dev->name);
+ pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
+}
+
+/*
+ * If we set up a device for bus mastering, we need to check the latency
+ * timer as certain crappy BIOSes forget to set it properly.
+ */
+unsigned int pcibios_max_latency = 255;
+
+void pcibios_set_master(struct pci_dev *dev)
+{
+ u8 lat;
+ pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
+ if (lat < 16)
+ lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
+ else if (lat > pcibios_max_latency)
+ lat = pcibios_max_latency;
+ else
+ return;
+ printk("PCI: Setting latency timer of device %s to %d\n", dev->slot_name, lat);
+ pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
+}
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/gt64111.h /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/gt64111.h
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/gt64111.h Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/gt64111.h Mon Oct 15 22:44:54 2001
@@ -0,0 +1,109 @@
+#ifndef _GT64111_H_
+#define _GT64111_H_
+
+#define MASTER_INTERFACE 0x0
+#define RAS10_LO_DEC_ADR 0x8
+#define RAS10_HI_DEC_ADR 0x10
+#define RAS32_LO_DEC_ADR 0x18
+#define RAS32_HI_DEC_ADR 0x20
+#define CS20_LO_DEC_ADR 0x28
+#define CS20_HI_DEC_ADR 0x30
+#define CS3_LO_DEC_ADR 0x38
+#define CS3_HI_DEC_ADR 0x40
+#define PCI_IO_LO_DEC_ADR 0x48
+#define PCI_IO_HI_DEC_ADR 0x50
+#define PCI_MEM0_LO_DEC_ADR 0x58
+#define PCI_MEM0_HI_DEC_ADR 0x60
+#define INTERNAL_SPACE_DEC 0x68
+#define BUS_ERR_ADR_LO_CPU 0x70
+#define READONLY0 0x78
+#define PCI_MEM1_LO_DEC_ADR 0x80
+#define PCI_MEM1_HI_DEC_ADR 0x88
+#define RAS0_LO_DEC_ADR 0x400
+#define RAS0_HI_DEC_ADR 0x404
+#define RAS1_LO_DEC_ADR 0x408
+#define RAS1_HI_DEC_ADR 0x40c
+#define RAS2_LO_DEC_ADR 0x410
+#define RAS2_HI_DEC_ADR 0x414
+#define RAS3_LO_DEC_ADR 0x418
+#define RAS3_HI_DEC_ADR 0x41c
+#define DEV_CS0_LO_DEC_ADR 0x420
+#define DEV_CS0_HI_DEC_ADR 0x424
+#define DEV_CS1_LO_DEC_ADR 0x428
+#define DEV_CS1_HI_DEC_ADR 0x42c
+#define DEV_CS2_LO_DEC_ADR 0x430
+#define DEV_CS2_HI_DEC_ADR 0x434
+#define DEV_CS3_LO_DEC_ADR 0x438
+#define DEV_CS3_HI_DEC_ADR 0x43c
+#define DEV_BOOTCS_LO_DEC_ADR 0x440
+#define DEV_BOOTCS_HI_DEC_ADR 0x444
+#define DEV_ADR_DEC_ERR 0x470
+#define DRAM_CFG 0x448
+#define DRAM_BANK0_PARMS 0x44c
+#define DRAM_BANK1_PARMS 0x450
+#define DRAM_BANK2_PARMS 0x454
+#define DRAM_BANK3_PARMS 0x458
+#define DEV_BANK0_PARMS 0x45c
+#define DEV_BANK1_PARMS 0x460
+#define DEV_BANK2_PARMS 0x464
+#define DEV_BANK3_PARMS 0x468
+#define DEV_BOOT_BANK_PARMS 0x46c
+#define CH0_DMA_BYTECOUNT 0x800
+#define CH1_DMA_BYTECOUNT 0x804
+#define CH2_DMA_BYTECOUNT 0x808
+#define CH3_DMA_BYTECOUNT 0x80c
+#define CH0_DMA_SRC_ADR 0x810
+#define CH1_DMA_SRC_ADR 0x814
+#define CH2_DMA_SRC_ADR 0x818
+#define CH3_DMA_SRC_ADR 0x81c
+#define CH0_DMA_DST_ADR 0x820
+#define CH1_DMA_DST_ADR 0x824
+#define CH2_DMA_DST_ADR 0x828
+#define CH3_DMA_DST_ADR 0x82c
+#define CH0_NEXT_REC_PTR 0x830
+#define CH1_NEXT_REC_PTR 0x834
+#define CH2_NEXT_REC_PTR 0x838
+#define CH3_NEXT_REC_PTR 0x83c
+#define CH0_CTRL 0x840
+#define CH1_CTRL 0x844
+#define CH2_CTRL 0x848
+#define CH3_CTRL 0x84c
+#define DMA_ARBITER 0x860
+#define TIMER0 0x850
+#define TIMER1 0x854
+#define TIMER2 0x858
+#define TIMER3 0x85c
+#define TIMER_CTRL 0x864
+#define PCI_CMD 0xc00
+#define PCI_TIMEOUT 0xc04
+#define PCI_RAS10_BANK_SIZE 0xc08
+#define PCI_RAS32_BANK_SIZE 0xc0c
+#define PCI_CS20_BANK_SIZE 0xc10
+#define PCI_CS3_BANK_SIZE 0xc14
+#define PCI_SERRMASK 0xc28
+#define PCI_INTACK 0xc34
+#define PCI_BAR_EN 0xc3c
+#define PCI_CFG_ADR 0xcf8
+#define PCI_CFG_DATA 0xcfc
+#define PCI_INTCAUSE 0xc18
+#define PCI_MAST_MASK 0xc1c
+#define PCI_PCIMASK 0xc24
+#define BAR_ENABLE_ADR 0xc3c
+
+/* These are config registers, accessible via PCI space */
+#define PCI_CONFIG_RAS10_BASE_ADR 0x010
+#define PCI_CONFIG_RAS32_BASE_ADR 0x014
+#define PCI_CONFIG_CS20_BASE_ADR 0x018
+#define PCI_CONFIG_CS3_BASE_ADR 0x01c
+#define PCI_CONFIG_INT_REG_MM_ADR 0x020
+#define PCI_CONFIG_INT_REG_IO_ADR 0x024
+#define PCI_CONFIG_BOARD_VENDOR 0x02c
+#define PCI_CONFIG_ROM_ADR 0x030
+#define PCI_CONFIG_INT_PIN_LINE 0x03c
+
+
+
+
+
+#endif
+
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/io.c /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/io.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/io.c Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/io.c Mon Oct 15 22:44:54 2001
@@ -0,0 +1,173 @@
+/*
+ * Copyright (C) 2000 David J. Mckay (david.mckay@st.com)
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License. See linux/COPYING for more information.
+ *
+ * This file contains the I/O routines for use on the overdrive board
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "overdrive.h"
+
+/*
+ * readX/writeX() are used to access memory mapped devices. On some
+ * architectures the memory mapped IO stuff needs to be accessed
+ * differently. On the SuperH architecture, we just read/write the
+ * memory location directly.
+ */
+
+#define dprintk(x...)
+
+/* Translates an IO address to where it is mapped in memory */
+
+#define io_addr(x) (((unsigned)(x))|PCI_GTIO_BASE)
+
+unsigned char od_inb(unsigned long port)
+{
+dprintk("od_inb(%x)\n", port);
+ return readb(io_addr(port)) & 0xff;
+}
+
+
+unsigned short od_inw(unsigned long port)
+{
+dprintk("od_inw(%x)\n", port);
+ return readw(io_addr(port)) & 0xffff;
+}
+
+unsigned int od_inl(unsigned long port)
+{
+dprintk("od_inl(%x)\n", port);
+ return readl(io_addr(port));
+}
+
+void od_outb(unsigned char value, unsigned long port)
+{
+dprintk("od_outb(%x, %x)\n", value, port);
+ writeb(value, io_addr(port));
+}
+
+void od_outw(unsigned short value, unsigned long port)
+{
+dprintk("od_outw(%x, %x)\n", value, port);
+ writew(value, io_addr(port));
+}
+
+void od_outl(unsigned int value, unsigned long port)
+{
+dprintk("od_outl(%x, %x)\n", value, port);
+ writel(value, io_addr(port));
+}
+
+/* This is horrible at the moment - needs more work to do something sensible */
+#define IO_DELAY() udelay(10)
+
+#define OUT_DELAY(x,type) \
+void od_out##x##_p(unsigned type value,unsigned long port){out##x(value,port);IO_DELAY();}
+
+#define IN_DELAY(x,type) \
+unsigned type od_in##x##_p(unsigned long port) {unsigned type tmp=in##x(port);IO_DELAY();return tmp;}
+
+
+OUT_DELAY(b,char)
+OUT_DELAY(w,short)
+OUT_DELAY(l,int)
+
+IN_DELAY(b,char)
+IN_DELAY(w,short)
+IN_DELAY(l,int)
+
+
+/* Now for the string version of these functions */
+void od_outsb(unsigned long port, const void *addr, unsigned long count)
+{
+ int i;
+ unsigned char *p = (unsigned char *) addr;
+
+ for (i = 0; i < count; i++, p++) {
+ outb(*p, port);
+ }
+}
+
+
+void od_insb(unsigned long port, void *addr, unsigned long count)
+{
+ int i;
+ unsigned char *p = (unsigned char *) addr;
+
+ for (i = 0; i < count; i++, p++) {
+ *p = inb(port);
+ }
+}
+
+/* For the 16 and 32 bit string functions, we have to worry about alignment.
+ * The SH does not do unaligned accesses, so we have to read as bytes and
+ * then write as a word or dword.
+ * This can be optimised a lot more, especially in the case where the data
+ * is aligned
+ */
+
+void od_outsw(unsigned long port, const void *addr, unsigned long count)
+{
+ int i;
+ unsigned short tmp;
+ unsigned char *p = (unsigned char *) addr;
+
+ for (i = 0; i < count; i++, p += 2) {
+ tmp = (*p) | ((*(p + 1)) << 8);
+ outw(tmp, port);
+ }
+}
+
+
+void od_insw(unsigned long port, void *addr, unsigned long count)
+{
+ int i;
+ unsigned short tmp;
+ unsigned char *p = (unsigned char *) addr;
+
+ for (i = 0; i < count; i++, p += 2) {
+ tmp = inw(port);
+ p[0] = tmp & 0xff;
+ p[1] = (tmp >> 8) & 0xff;
+ }
+}
+
+
+void od_outsl(unsigned long port, const void *addr, unsigned long count)
+{
+ int i;
+ unsigned tmp;
+ unsigned char *p = (unsigned char *) addr;
+
+ for (i = 0; i < count; i++, p += 4) {
+ tmp = (*p) | ((*(p + 1)) << 8) | ((*(p + 2)) << 16) |
+ ((*(p + 3)) << 24);
+ outl(tmp, port);
+ }
+}
+
+
+void od_insl(unsigned long port, void *addr, unsigned long count)
+{
+ int i;
+ unsigned tmp;
+ unsigned char *p = (unsigned char *) addr;
+
+ for (i = 0; i < count; i++, p += 4) {
+ tmp = inl(port);
+ p[0] = tmp & 0xff;
+ p[1] = (tmp >> 8) & 0xff;
+ p[2] = (tmp >> 16) & 0xff;
+ p[3] = (tmp >> 24) & 0xff;
+
+ }
+}
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/io_od.h /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/io_od.h
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/io_od.h Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/io_od.h Mon Oct 15 22:44:54 2001
@@ -0,0 +1,77 @@
+/*
+ * include/asm-sh/io_od.h
+ *
+ * Copyright 2000 Stuart Menefy (stuart.menefy@st.com)
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License. See linux/COPYING for more information.
+ *
+ * IO functions for an STMicroelectronics Overdrive
+ */
+
+#ifndef _ASM_SH_IO_OD_H
+#define _ASM_SH_IO_OD_H
+
+#include
+
+extern unsigned char od_inb(unsigned long port);
+extern unsigned short od_inw(unsigned long port);
+extern unsigned int od_inl(unsigned long port);
+
+extern void od_outb(unsigned char value, unsigned long port);
+extern void od_outw(unsigned short value, unsigned long port);
+extern void od_outl(unsigned int value, unsigned long port);
+
+extern unsigned char od_inb_p(unsigned long port);
+extern unsigned short od_inw_p(unsigned long port);
+extern unsigned int od_inl_p(unsigned long port);
+extern void od_outb_p(unsigned char value, unsigned long port);
+extern void od_outw_p(unsigned short value, unsigned long port);
+extern void od_outl_p(unsigned int value, unsigned long port);
+
+extern void od_insb(unsigned long port, void *addr, unsigned long count);
+extern void od_insw(unsigned long port, void *addr, unsigned long count);
+extern void od_insl(unsigned long port, void *addr, unsigned long count);
+extern void od_outsb(unsigned long port, const void *addr, unsigned long count);
+extern void od_outsw(unsigned long port, const void *addr, unsigned long count);
+extern void od_outsl(unsigned long port, const void *addr, unsigned long count);
+
+extern unsigned long od_isa_port2addr(unsigned long offset);
+
+#ifdef __WANT_IO_DEF
+
+# define __inb od_inb
+# define __inw od_inw
+# define __inl od_inl
+# define __outb od_outb
+# define __outw od_outw
+# define __outl od_outl
+
+# define __inb_p od_inb_p
+# define __inw_p od_inw_p
+# define __inl_p od_inl_p
+# define __outb_p od_outb_p
+# define __outw_p od_outw_p
+# define __outl_p od_outl_p
+
+# define __insb od_insb
+# define __insw od_insw
+# define __insl od_insl
+# define __outsb od_outsb
+# define __outsw od_outsw
+# define __outsl od_outsl
+
+# define __readb generic_readb
+# define __readw generic_readw
+# define __readl generic_readl
+# define __writeb generic_writeb
+# define __writew generic_writew
+# define __writel generic_writel
+
+# define __isa_port2addr od_isa_port2addr
+# define __ioremap generic_ioremap
+# define __iounmap generic_iounmap
+
+#endif
+
+#endif /* _ASM_SH_IO_OD_H */
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/irq.c /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/irq.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/irq.c Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/irq.c Mon Oct 15 22:44:54 2001
@@ -0,0 +1,192 @@
+/*
+ * Copyright (C) 2000 David J. Mckay (david.mckay@st.com)
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License. See linux/COPYING for more information.
+ *
+ * Looks after interrupts on the overdrive board.
+ *
+ * Bases on the IPR irq system
+ */
+
+#include
+#include
+#include
+
+#include
+#include
+
+#include "overdrive.h"
+
+struct od_data {
+ int overdrive_irq;
+ int irq_mask;
+};
+
+#define NUM_EXTERNAL_IRQS 16
+#define EXTERNAL_IRQ_NOT_IN_USE (-1)
+#define EXTERNAL_IRQ_NOT_ASSIGNED (-1)
+
+/*
+ * This table is used to determine what to program into the FPGA's CT register
+ * for the specified Linux IRQ.
+ *
+ * The irq_mask gives the interrupt number from the PCI board (PCI_Int(6:0))
+ * but is one greater than that because the because the FPGA treats 0
+ * as disabled, a value of 1 asserts PCI_Int0, and so on.
+ *
+ * The overdrive_irq specifies which of the eight interrupt sources generates
+ * that interrupt, and but is multiplied by four to give the bit offset into
+ * the CT register.
+ *
+ * The seven interrupts levels (SH4 IRL's) we have available here is hardwired
+ * by the EPLD. The assignments here of which PCI interrupt generates each
+ * level is arbitary.
+ */
+static struct od_data od_data_table[NUM_EXTERNAL_IRQS] = {
+ /* overdrive_irq , irq_mask */
+ {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 0 */
+ {EXTERNAL_IRQ_NOT_ASSIGNED, 7}, /* 1 */
+ {EXTERNAL_IRQ_NOT_ASSIGNED, 6}, /* 2 */
+ {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 3 */
+ {EXTERNAL_IRQ_NOT_ASSIGNED, 5}, /* 4 */
+ {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 5 */
+ {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 6 */
+ {EXTERNAL_IRQ_NOT_ASSIGNED, 4}, /* 7 */
+ {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 8 */
+ {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 9 */
+ {EXTERNAL_IRQ_NOT_ASSIGNED, 3}, /* 10 */
+ {EXTERNAL_IRQ_NOT_ASSIGNED, 2}, /* 11 */
+ {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 12 */
+ {EXTERNAL_IRQ_NOT_ASSIGNED, 1}, /* 13 */
+ {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 14 */
+ {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE} /* 15 */
+};
+
+static void set_od_data(int overdrive_irq, int irq)
+{
+ if (irq >= NUM_EXTERNAL_IRQS || irq < 0)
+ return;
+ od_data_table[irq].overdrive_irq = overdrive_irq << 2;
+}
+
+static void enable_od_irq(unsigned int irq);
+void disable_od_irq(unsigned int irq);
+
+/* shutdown is same as "disable" */
+#define shutdown_od_irq disable_od_irq
+
+static void mask_and_ack_od(unsigned int);
+static void end_od_irq(unsigned int irq);
+
+static unsigned int startup_od_irq(unsigned int irq)
+{
+ enable_od_irq(irq);
+ return 0; /* never anything pending */
+}
+
+static struct hw_interrupt_type od_irq_type = {
+ "Overdrive-IRQ",
+ startup_od_irq,
+ shutdown_od_irq,
+ enable_od_irq,
+ disable_od_irq,
+ mask_and_ack_od,
+ end_od_irq
+};
+
+static void disable_od_irq(unsigned int irq)
+{
+ unsigned val, flags;
+ int overdrive_irq;
+ unsigned mask;
+
+ /* Not a valid interrupt */
+ if (irq < 0 || irq >= NUM_EXTERNAL_IRQS)
+ return;
+
+ /* Is is necessary to use a cli here? Would a spinlock not be
+ * mroe efficient?
+ */
+ save_and_cli(flags);
+ overdrive_irq = od_data_table[irq].overdrive_irq;
+ if (overdrive_irq != EXTERNAL_IRQ_NOT_ASSIGNED) {
+ mask = ~(0x7 << overdrive_irq);
+ val = ctrl_inl(OVERDRIVE_INT_CT);
+ val &= mask;
+ ctrl_outl(val, OVERDRIVE_INT_CT);
+ }
+ restore_flags(flags);
+}
+
+static void enable_od_irq(unsigned int irq)
+{
+ unsigned val, flags;
+ int overdrive_irq;
+ unsigned mask;
+
+ /* Not a valid interrupt */
+ if (irq < 0 || irq >= NUM_EXTERNAL_IRQS)
+ return;
+
+ /* Set priority in OD back to original value */
+ save_and_cli(flags);
+ /* This one is not in use currently */
+ overdrive_irq = od_data_table[irq].overdrive_irq;
+ if (overdrive_irq != EXTERNAL_IRQ_NOT_ASSIGNED) {
+ val = ctrl_inl(OVERDRIVE_INT_CT);
+ mask = ~(0x7 << overdrive_irq);
+ val &= mask;
+ mask = od_data_table[irq].irq_mask << overdrive_irq;
+ val |= mask;
+ ctrl_outl(val, OVERDRIVE_INT_CT);
+ }
+ restore_flags(flags);
+}
+
+
+
+/* this functions sets the desired irq handler to be an overdrive type */
+static void __init make_od_irq(unsigned int irq)
+{
+ disable_irq_nosync(irq);
+ irq_desc[irq].handler = &od_irq_type;
+ disable_od_irq(irq);
+}
+
+
+static void mask_and_ack_od(unsigned int irq)
+{
+ disable_od_irq(irq);
+}
+
+static void end_od_irq(unsigned int irq)
+{
+ enable_od_irq(irq);
+}
+
+void __init init_overdrive_irq(void)
+{
+ int i;
+
+ /* Disable all interrupts */
+ ctrl_outl(0, OVERDRIVE_INT_CT);
+
+ /* Update interrupt pin mode to use encoded interrupts */
+ i = ctrl_inw(INTC_ICR);
+ i &= ~INTC_ICR_IRLM;
+ ctrl_outw(i, INTC_ICR);
+
+ for (i = 0; i < NUM_EXTERNAL_IRQS; i++) {
+ if (od_data_table[i].irq_mask != EXTERNAL_IRQ_NOT_IN_USE) {
+ make_od_irq(i);
+ } else if (i != 15) { // Cannot use imask on level 15
+ make_imask_irq(i);
+ }
+ }
+
+ /* Set up the interrupts */
+ set_od_data(OVERDRIVE_PCI_INTA, OVERDRIVE_PCI_IRQ1);
+ set_od_data(OVERDRIVE_PCI_INTB, OVERDRIVE_PCI_IRQ2);
+ set_od_data(OVERDRIVE_AUDIO_INT, OVERDRIVE_ESS_IRQ);
+}
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/led.c /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/led.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/led.c Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/led.c Mon Oct 15 22:44:54 2001
@@ -0,0 +1,59 @@
+/*
+ * linux/arch/sh/overdrive/led.c
+ *
+ * Copyright (C) 1999 Stuart Menefy
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License. See linux/COPYING for more information.
+ *
+ * This file contains an Overdrive specific LED feature.
+ */
+
+#include
+#include
+#include
+#include "overdrive.h"
+
+static void mach_led(int position, int value)
+{
+ unsigned long flags;
+ unsigned long reg;
+
+ save_and_cli(flags);
+
+ reg = readl(OVERDRIVE_CTRL);
+ if (value) {
+ reg |= (1<<3);
+ } else {
+ reg &= ~(1<<3);
+ }
+ writel(reg, OVERDRIVE_CTRL);
+
+ restore_flags(flags);
+}
+
+#ifdef CONFIG_HEARTBEAT
+
+#include
+
+/* acts like an actual heart beat -- ie thump-thump-pause... */
+void heartbeat_od(void)
+{
+ static unsigned cnt = 0, period = 0, dist = 0;
+
+ if (cnt == 0 || cnt == dist)
+ mach_led( -1, 1);
+ else if (cnt == 7 || cnt == dist+7)
+ mach_led( -1, 0);
+
+ if (++cnt > period) {
+ cnt = 0;
+ /* The hyperbolic function below modifies the heartbeat period
+ * length in dependency of the current (5min) load. It goes
+ * through the points f(0)=126, f(1)=86, f(5)=51,
+ * f(inf)->30. */
+ period = ((672<
+
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+void heartbeat_od(void);
+void setup_od(void);
+void init_overdrive_irq(void);
+void galileo_pcibios_init(void);
+
+/*
+ * The Machine Vector
+ */
+
+struct sh_machine_vector mv_od __initmv = {
+ mv_name: "SH7750 Overdrive",
+
+ mv_nr_irqs: 48,
+
+ mv_inb: od_inb,
+ mv_inw: od_inw,
+ mv_inl: od_inl,
+ mv_outb: od_outb,
+ mv_outw: od_outw,
+ mv_outl: od_outl,
+
+ mv_inb_p: od_inb_p,
+ mv_inw_p: od_inw_p,
+ mv_inl_p: od_inl_p,
+ mv_outb_p: od_outb_p,
+ mv_outw_p: od_outw_p,
+ mv_outl_p: od_outl_p,
+
+ mv_insb: od_insb,
+ mv_insw: od_insw,
+ mv_insl: od_insl,
+ mv_outsb: od_outsb,
+ mv_outsw: od_outsw,
+ mv_outsl: od_outsl,
+
+ mv_readb: generic_readb,
+ mv_readw: generic_readw,
+ mv_readl: generic_readl,
+ mv_writeb: generic_writeb,
+ mv_writew: generic_writew,
+ mv_writel: generic_writel,
+
+ mv_ioremap: generic_ioremap,
+ mv_iounmap: generic_iounmap,
+
+ mv_isa_port2addr: generic_isa_port2addr,
+
+ mv_init_arch: setup_od,
+#ifdef CONFIG_PCI
+ mv_init_irq: init_overdrive_irq,
+#endif
+#ifdef CONFIG_HEARTBEAT
+ mv_heartbeat: heartbeat_od,
+#endif
+ mv_rtc_gettimeofday: sh_rtc_gettimeofday,
+ mv_rtc_settimeofday: sh_rtc_settimeofday,
+};
+
+ALIAS_MV(od)
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/overdrive.h /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/overdrive.h
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/overdrive.h Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/overdrive.h Mon Oct 15 22:44:54 2001
@@ -0,0 +1,89 @@
+/*
+ * Copyright (C) 2000 David J. Mckay (david.mckay@st.com)
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License. See linux/COPYING for more information.
+ *
+ */
+
+#include
+
+#ifndef __OVERDRIVE_H__
+#define __OVERDRIVE_H__
+
+#define OVERDRIVE_INT_CT 0xa3a00000
+#define OVERDRIVE_INT_DT 0xa3b00000
+
+#define OVERDRIVE_CTRL 0xa3000000
+
+/* Shoving all these bits into the same register is not a good idea.
+ * As soon as I get a spare moment, I'll change the FPGA and put each
+ * bit in a separate register
+ */
+
+#define VALID_CTRL_BITS 0x1f
+
+#define ENABLE_RS232_MASK 0x1e
+#define DISABLE_RS232_BIT 0x01
+
+#define ENABLE_NMI_MASK 0x1d
+#define DISABLE_NMI_BIT 0x02
+
+#define RESET_PCI_MASK 0x1b
+#define ENABLE_PCI_BIT 0x04
+
+#define ENABLE_LED_MASK 0x17
+#define DISABLE_LED_BIT 0x08
+
+#define RESET_FPGA_MASK 0x0f
+#define ENABLE_FPGA_BIT 0x10
+
+
+#define FPGA_DCLK_ADDRESS 0xA3C00000
+
+#define FPGA_DATA 0x01 /* W */
+#define FPGA_CONFDONE 0x02 /* R */
+#define FPGA_NOT_STATUS 0x04 /* R */
+#define FPGA_INITDONE 0x08 /* R */
+
+#define FPGA_TIMEOUT 100000
+
+
+/* Interrupts for the overdrive. Note that these numbers have
+ * nothing to do with the actual IRQ numbers they appear on,
+ * this is all programmable. This is simply the position in the
+ * INT_CT register.
+ */
+
+#define OVERDRIVE_PCI_INTA 0
+#define OVERDRIVE_PCI_INTB 1
+#define OVERDRIVE_PCI_INTC 2
+#define OVERDRIVE_PCI_INTD 3
+#define OVERDRIVE_GALILEO_INT 4
+#define OVERDRIVE_GALILEO_LOCAL_INT 5
+#define OVERDRIVE_AUDIO_INT 6
+#define OVERDRIVE_KEYBOARD_INT 7
+
+/* Which Linux IRQ should we assign to each interrupt source? */
+#define OVERDRIVE_PCI_IRQ1 2
+#ifdef CONFIG_HACKED_NE2K
+#define OVERDRIVE_PCI_IRQ2 7
+#else
+#define OVERDRIVE_PCI_IRQ2 2
+#undef OVERDRIVE_PCI_INTB
+#define OVERDRIVE_PCI_INTB OVERDRIVE_PCI_INTA
+
+#endif
+
+/* Put the ESS solo audio chip on IRQ 4 */
+#define OVERDRIVE_ESS_IRQ 4
+
+/* Where the memory behind the PCI bus appears */
+#define PCI_DRAM_BASE 0xb7000000
+#define PCI_DRAM_SIZE (16*1024*1024)
+#define PCI_DRAM_FINISH (PCI_DRAM_BASE+PCI_DRAM_SIZE-1)
+
+/* Where the IO region appears in the memory */
+#define PCI_GTIO_BASE 0xb8000000
+
+#endif
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/overdrive.ttf /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/overdrive.ttf
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/overdrive.ttf Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/overdrive.ttf Mon Oct 15 22:44:56 2001
@@ -0,0 +1,770 @@
+255,255, 98,255, 51, 0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,
+160, 9, 52,129, 38,208, 4,154, 64, 19, 0, 89, 96, 10,100,129,137,134, 85, 6,154, 0, 25,104, 2, 77,160, 76,148, 1, 0, 0, 0, 0, 0, 6,202, 0, 25, 0, 89,100,170, 9, 52,129, 38, 80, 6,154, 68, 19,112, 2, 96, 10, 76,149,129, 50, 64, 6,200, 0,188,254,
+ 0, 21,160, 2, 84,128, 10, 80, 1, 42,128, 10, 80, 1, 42, 64, 7,180,128, 10, 80, 1, 42, 64, 5,168, 0, 61,160, 2, 0, 0, 0, 0, 0, 9, 80, 1, 46,128, 10,120, 1, 21,160, 2, 84,128, 10,208, 3, 42, 64, 5, 80, 1, 42,160, 2, 84,128, 11,112, 1,204,254,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 2, 64, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0, 0, 0,128, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,128, 0, 16, 0, 0, 8, 0, 0, 0, 0,204,252,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 0, 0, 0, 0, 0,124,254,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 12, 0,128, 2, 0, 0, 2, 0, 0, 0, 64,101,160, 0, 0, 0, 0, 0, 0, 0, 80, 0, 2, 0, 0, 74, 9, 0, 0, 0, 0,128, 66, 0, 2, 0, 0, 0, 0, 1, 32,160, 0, 4,160, 0, 16, 0, 72,252,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 8, 0, 0, 1, 0, 32, 2, 0, 0, 0, 1, 0, 0, 0, 12,128, 4, 0, 0, 0, 0, 0, 0, 80, 0, 8, 1, 0, 32, 0, 0, 0, 0, 0, 0, 2,130, 0, 0, 0, 0, 0,130, 8,128, 16,144, 0, 2, 0, 1,160,254,
+160, 9, 54, 0, 0, 16, 0, 18, 16, 0, 72, 68, 0, 32, 0, 0, 0, 0,208, 0, 0, 64, 34,104, 0, 69, 4, 0, 0, 0, 0, 0, 0, 0, 80, 24, 26, 64, 33, 1, 0, 1, 32,144, 36,192, 66, 4, 0, 26, 64, 3, 8, 0, 1,160, 16, 0,128, 66, 18, 0, 2, 0,240,252,
+ 0, 1, 48, 0, 0, 0, 0, 8, 0, 0, 32, 0, 0, 0, 0, 0, 0, 0,192, 0, 0, 0, 1, 2, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 24, 0, 2, 0, 0, 0, 0, 0, 16, 0, 4, 0, 0, 24, 0, 3, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 16,204,253,
+128, 1, 60, 0, 0,240, 0, 22, 0, 0, 88, 0, 0,224, 1, 0, 0, 0,240, 0, 0,192, 2, 96, 16, 7, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 30,192, 1, 0, 0, 12, 96, 0, 44,128, 3, 0, 0, 30,192, 3, 0, 0, 12,224, 0, 0,128, 3,240, 0, 0, 4, 72,252,
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+ 0, 0, 0, 32, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 32, 0, 0,128, 0, 0, 64, 0, 64, 0, 0, 0, 0, 32, 8, 0, 0, 0, 0, 0, 0, 24, 0, 2, 0, 0, 2, 1, 0, 32, 0, 0, 0, 0, 0, 0, 0, 64, 0, 8, 0, 1, 32, 0, 20,128, 2, 16, 0,196,252,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 1, 0, 0,164,255,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 0, 0, 2, 64, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 64, 0, 8, 0, 0, 64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,128, 0, 16, 0, 2, 64, 0, 0, 0, 0, 32, 0,172,253,
+ 0, 23,224, 2,188,128, 11, 80, 1, 42, 64, 5,168, 0, 45,160, 2, 92,128, 10, 80, 1, 46, 64, 5,168, 0, 21,224, 2, 0, 0, 0, 0,128, 10, 80, 1, 42, 64, 5,104, 1, 21,224, 2, 84,128, 10, 80, 1, 42, 64, 5,104, 1, 21,160, 5, 84,128, 10, 80, 1,100,253,
+192, 8, 20, 1,131, 85, 4,136, 0, 17,104, 2, 77,128, 96,145, 1, 34, 64, 6,200, 0, 17, 32, 3, 77,128, 8,144, 1, 0, 0, 0, 0,208, 4,200, 0, 25,120, 2, 77,162, 9,144, 1, 39,208, 4,156, 0, 17, 40, 3, 37,162, 12,148,172, 50, 80, 6,202, 0, 80,255,
+255,255
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/pcidma.c /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/pcidma.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/pcidma.c Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/pcidma.c Mon Oct 15 22:44:56 2001
@@ -0,0 +1,46 @@
+/*
+ * Copyright (C) 2000 David J. Mckay (david.mckay@st.com)
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License. See linux/COPYING for more information.
+ *
+ * Dynamic DMA mapping support.
+ *
+ * On the overdrive, we can only DMA from memory behind the PCI bus!
+ * this means that all DMA'able memory must come from there.
+ * this restriction will not apply to later boards.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
+ dma_addr_t * dma_handle)
+{
+ void *ret;
+ int gfp = GFP_ATOMIC;
+
+ printk("BUG: pci_alloc_consistent() called - not yet supported\n");
+ /* We ALWAYS need DMA memory on the overdrive hardware,
+ * due to it's extreme wierdness
+ * Need to flush the cache here as well, since the memory
+ * can still be seen through the cache!
+ */
+ gfp |= GFP_DMA;
+ ret = (void *) __get_free_pages(gfp, get_order(size));
+
+ if (ret != NULL) {
+ memset(ret, 0, size);
+ *dma_handle = virt_to_bus(ret);
+ }
+ return ret;
+}
+
+void pci_free_consistent(struct pci_dev *hwdev, size_t size,
+ void *vaddr, dma_addr_t dma_handle)
+{
+ free_pages((unsigned long) vaddr, get_order(size));
+}
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/setup.c /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/setup.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/overdrive/setup.c Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/arch/sh/overdrive/setup.c Mon Oct 15 22:44:56 2001
@@ -0,0 +1,32 @@
+/*
+ * arch/sh/overdrive/setup.c
+ *
+ * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com)
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License. See linux/COPYING for more information.
+ *
+ * STMicroelectronics Overdrive Support.
+ */
+
+#include
+#include
+#include
+#include
+
+#include "overdrive.h"
+#include "fpga.h"
+
+/*
+ * Initialize the board
+ */
+int __init setup_od(void)
+{
+#ifdef CONFIG_PCI
+ init_overdrive_fpga();
+ galileo_init();
+#endif
+
+ /* Enable RS232 receive buffers */
+ writel(0x1e, OVERDRIVE_CTRL);
+}
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/vmlinux.lds.S /usr/src/sh/7751/cvs/linux/arch/sh/vmlinux.lds.S
--- /usr/src/sh/7751/cvs/linux-2.4.18/arch/sh/vmlinux.lds.S Mon Feb 25 21:37:56 2002
+++ /usr/src/sh/7751/cvs/linux/arch/sh/vmlinux.lds.S Tue Feb 26 13:42:27 2002
@@ -1,4 +1,4 @@
-/* $Id: vmlinux.lds.in,v 1.5 2001/07/27 11:45:55 gniibe Exp $
+/* $Id: vmlinux.lds.S,v 1.1.1.1.2.1 2002/02/26 11:42:27 gniibe Exp $
* ld script to make SuperH Linux kernel
* Written by Niibe Yutaka
*/
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/drivers/Makefile /usr/src/sh/7751/cvs/linux/drivers/Makefile
--- /usr/src/sh/7751/cvs/linux-2.4.18/drivers/Makefile Mon Feb 25 21:37:56 2002
+++ /usr/src/sh/7751/cvs/linux/drivers/Makefile Tue Feb 26 13:42:29 2002
@@ -8,7 +8,7 @@
mod-subdirs := dio mtd sbus video macintosh usb input telephony sgi ide \
message/i2o message/fusion scsi md ieee1394 pnp isdn atm \
- fc4 net/hamradio i2c acpi bluetooth
+ fc4 net/hamradio i2c acpi bluetooth maple
subdir-y := parport char block net sound misc media cdrom hotplug
subdir-m := $(subdir-y)
@@ -46,5 +46,6 @@
subdir-$(CONFIG_ACPI) += acpi
subdir-$(CONFIG_BLUEZ) += bluetooth
+subdir-$(CONFIG_MAPLE) += maple
include $(TOPDIR)/Rules.make
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/drivers/cdrom/Config.in /usr/src/sh/7751/cvs/linux/drivers/cdrom/Config.in
--- /usr/src/sh/7751/cvs/linux-2.4.18/drivers/cdrom/Config.in Mon Jan 24 21:04:37 2000
+++ /usr/src/sh/7751/cvs/linux/drivers/cdrom/Config.in Mon Oct 15 22:44:57 2001
@@ -25,3 +25,4 @@
tristate ' ISP16/MAD16/Mozart soft configurable cdrom interface support' CONFIG_ISP16_CDI
tristate ' Sony CDU31A/CDU33A CDROM support' CONFIG_CDU31A
tristate ' Sony CDU535 CDROM support' CONFIG_CDU535
+tristate ' SEGA Dreamcast GD-ROM device CD-R support' CONFIG_SEGA_GDROM
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/drivers/cdrom/Makefile /usr/src/sh/7751/cvs/linux/drivers/cdrom/Makefile
--- /usr/src/sh/7751/cvs/linux-2.4.18/drivers/cdrom/Makefile Sat Dec 30 00:07:21 2000
+++ /usr/src/sh/7751/cvs/linux/drivers/cdrom/Makefile Mon Oct 15 22:44:57 2001
@@ -42,6 +42,7 @@
obj-$(CONFIG_SBPCD4) += sbpcd4.o cdrom.o
obj-$(CONFIG_SJCD) += sjcd.o
obj-$(CONFIG_CDU535) += sonycd535.o
+obj-$(CONFIG_SEGA_GDROM) += gdrom.o cdrom.o
# Hand off to Rules.make.
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/drivers/cdrom/gdrom.c /usr/src/sh/7751/cvs/linux/drivers/cdrom/gdrom.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/drivers/cdrom/gdrom.c Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/drivers/cdrom/gdrom.c Tue Dec 4 02:17:22 2001
@@ -0,0 +1,516 @@
+/* $Id: gdrom.c,v 1.1.1.1.2.1 2001/12/04 00:17:22 jzs Exp $
+ *
+ * SEGA Dreamcast GD-ROM Drive CD-R support
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Original code: NetBSD version:
+ * Copyright (c) 2001 Marcus Comstedt
+ * $NetBSD: gdrom.c,v 1.4 2001/04/24 19:43:25 marcus Exp $
+ *
+ * First Linux implementation by BERO
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+#define GDROM_MAJOR 250 /* Experimental */
+#define MAJOR_NR GDROM_MAJOR
+
+#define DEVICE_NAME "GD-ROM"
+#define DEVICE_REQUEST do_gdrom_request
+#define DEVICE_NR(device) (MINOR(device))
+#define DEVICE_STR "gdrom"
+
+#include
+#include
+
+#include
+#include
+#include
+
+static struct block_device_operations gdrom_bdops =
+{
+ owner: THIS_MODULE,
+ open: cdrom_open,
+ release: cdrom_release,
+ ioctl: cdrom_ioctl,
+ check_media_change: cdrom_media_changed,
+};
+
+static int gdrom_blocksize = 2048;
+static int gdrom_hardsecsize = 2048;
+
+#define GDROM_SESSION_OFFSET 150
+#define GDROM_IRQ HW_EVENT_GDROM_CMD
+
+#define GDROM_REACTIVATE 0x5f74e4
+static void __init gdrom_start(void)
+{
+ unsigned long p;
+
+ outl(0x1fffff, GDROM_REACTIVATE);
+ for (p = 0xa0000000; p < 0xa0200000; p += 4)
+ ctrl_inl(p);
+}
+
+struct gd_toc {
+ unsigned int entry[99];
+ unsigned int first, last;
+ unsigned int leadout;
+};
+
+struct gdrom_control {
+ int users;
+ int cmd;
+ int status;
+ void *buf;
+ int size;
+ struct completion *waiting;
+ struct gd_toc toc;
+};
+
+static struct gdrom_control gdrom_control[1];
+
+#define GDROM_BASE 0x5f7000
+
+#define GDROM_STATUS (GDROM_BASE+0x9c)
+#define GDROM_COMMAND GDROM_STATUS
+static inline int gdrom_get_status(void)
+{
+ return inb(GDROM_STATUS);
+}
+
+#define GDROM_ALTSTATUS (GDROM_BASE+0x18)
+static inline int gdrom_check_busy(void)
+{
+ return inb(GDROM_ALTSTATUS);
+}
+
+#define GDROM_CNTLO (GDROM_BASE+0x90)
+#define GDROM_CNTHI (GDROM_BASE+0x94)
+static inline int gdrom_get_count(void)
+{
+ return (inb(GDROM_CNTHI)<<8)|inb(GDROM_CNTLO);
+}
+
+#define GDROM_DATA (GDROM_BASE+0x80)
+#define GDROM_FEATURE (GDROM_BASE+0x84)
+#define GDROM_NSECTOR (GDROM_BASE+0x88)
+#define GDROM_SECTOR (GDROM_BASE+0x8c)
+
+#define ERR_STAT 0x01
+#define DRQ_STAT 0x08
+#define BUSY_STAT 0x80
+
+/* XXX: We should implement timeout */
+
+static void
+gdrom_intr(int irq, void *dev_id, struct pt_regs *reg)
+{
+ struct gdrom_control *ctrl = (struct gdrom_control *)dev_id;
+ int stat, count;
+
+ if (ctrl->cmd == 0) {
+ printk(KERN_INFO "GDROM: spurious interrupt.\n");
+ return;
+ }
+
+ stat = gdrom_get_status();
+ if ((stat & ERR_STAT) || (stat & DRQ_STAT) == 0) {
+ /* Command complete */
+ if ((stat & ERR_STAT)) {
+ printk(KERN_ERR "GDROM ERR\n");
+ ctrl->status = -EIO;
+ } else
+ ctrl->status = 0;
+
+ ctrl->cmd = 0;
+ if (ctrl->waiting) {
+ struct completion *w = ctrl->waiting;
+ ctrl->waiting = NULL;
+ complete(w);
+ }
+ return;
+ }
+
+ count = gdrom_get_count();
+ if (count != 0) {
+ if (count > ctrl->size) {
+ printk(KERN_ERR "GD-ROM: Got larger result\n");
+ count = ctrl->size;
+ }
+
+ insw(GDROM_DATA, ctrl->buf, count/2);
+ ctrl->buf += count;
+ ctrl->size -= count;
+ }
+
+ /* XXX: Don't busy loop... */
+ while ((gdrom_check_busy() & 0x80))
+ asm volatile("");
+}
+
+static int
+gdrom_do_command(unsigned char *cmd, unsigned int count)
+{
+ unsigned long flags;
+
+ /* XXX: Don't busy loop... */
+ while ((gdrom_check_busy() & 0x88))
+ asm volatile("");
+
+ outb(0, GDROM_FEATURE);
+ outb(0, GDROM_NSECTOR);
+ outb(0, GDROM_SECTOR);
+ outb(count&0xff, GDROM_CNTLO);
+ outb((count >> 8), GDROM_CNTHI);
+
+ save_and_cli(flags);
+ outb(0xa0, GDROM_COMMAND);
+ udelay(1);
+
+ /* XXX: Don't busy loop... */
+ while ((gdrom_check_busy() & 0x88) != 8)
+ asm volatile("");
+
+ outsw(GDROM_DATA, cmd, 6);
+ restore_flags(flags);
+ return 0;
+}
+
+static void
+gdrom_command_sense(struct gdrom_control *ctrl)
+{
+ int sense_key, sense_specific;
+ unsigned short sense_data[5];
+ unsigned char cmd[12];
+ DECLARE_COMPLETION(wait);
+
+ memset(cmd, 0, sizeof(cmd));
+ cmd[0] = 0x13;
+ cmd[4] = sizeof(sense_data);
+
+ ctrl->cmd = 1;
+ ctrl->waiting = &wait;
+ ctrl->buf = sense_data;
+ ctrl->size = sizeof(sense_data);
+ if (gdrom_do_command(cmd, sizeof(sense_data)) < 0)
+ return;
+
+ wait_for_completion(&wait);
+
+ sense_key = sense_data[1] & 0xf;
+ sense_specific = sense_data[4];
+ if (sense_key == 11 && sense_specific == 0)
+ printk(KERN_INFO "GDROM: aborted(ignored).\n");
+}
+
+static int
+gdrom_read_sectors(struct gdrom_control *ctrl,
+ unsigned char *buf, int sector, int count)
+{
+ unsigned char cmd[12];
+ int block, nblocks;
+ DECLARE_COMPLETION(wait);
+
+ if ((sector & 3) || (count & 3)) {
+ printk(KERN_ERR "GD-ROM: Wierd?? SEC=%04d, CNT=%03d\n", sector, count);
+ return -EIO;
+ }
+
+ block = sector/4 + GDROM_SESSION_OFFSET;
+ nblocks = count/4;
+
+ memset(cmd, 0, sizeof(cmd));
+ cmd[0] = 0x30;
+ cmd[1] = 0x20;
+ cmd[2] = block>>16;
+ cmd[3] = block>>8;
+ cmd[4] = block;
+ cmd[8] = nblocks>>16;
+ cmd[9] = nblocks>>8;
+ cmd[10] = nblocks;
+
+ ctrl->cmd = 1;
+ ctrl->waiting = &wait;
+ ctrl->buf = buf;
+ ctrl->size = count<<9;
+ if (gdrom_do_command(cmd, nblocks<<11) == 0) {
+ wait_for_completion(&wait);
+ if (ctrl->status == 0) {
+ if (ctrl->size == 0)
+ return count;
+ }
+ }
+ printk(KERN_ERR "GDROM: %d-byte not read\n", ctrl->size);
+ gdrom_command_sense(ctrl);
+ return -EIO;
+}
+
+static int
+gdrom_read_toc(struct gdrom_control *ctrl)
+{
+ unsigned char cmd[12];
+ int stat;
+ DECLARE_COMPLETION(wait);
+
+ memset(cmd, 0, sizeof(cmd));
+ cmd[0] = 0x14;
+ cmd[3] = sizeof(struct gd_toc)>>8;
+ cmd[4] = sizeof(struct gd_toc)&0xff;
+
+ ctrl->cmd = 1;
+ ctrl->waiting = &wait;
+ ctrl->buf = &ctrl->toc;
+ ctrl->size = sizeof(struct gd_toc);
+ if (gdrom_do_command(cmd, sizeof(struct gd_toc)) == 0) {
+ wait_for_completion(&wait);
+ stat = ctrl->status;
+ } else
+ stat = -EIO;
+ if (stat != 0)
+ gdrom_command_sense(ctrl);
+ return stat;
+}
+
+static int
+gdrom_mount_disk(struct gdrom_control *ctrl)
+{
+ unsigned char cmd[12];
+ int stat;
+ DECLARE_COMPLETION(wait);
+
+ memset(cmd, 0, sizeof(cmd));
+ cmd[0] = 0x70;
+ cmd[1] = 0x1f;
+
+ ctrl->cmd = 1;
+ ctrl->waiting = &wait;
+ ctrl->buf = NULL;
+ ctrl->size = 0;
+ if (gdrom_do_command(cmd, 0) == 0) {
+ wait_for_completion(&wait);
+ stat = ctrl->status;
+ } else
+ stat = -EIO;
+ if (stat != 0)
+ gdrom_command_sense(ctrl);
+ return stat;
+}
+
+static void do_gdrom_request(request_queue_t *q)
+{
+ while (1) {
+ int ret = 0;
+ struct request *req = CURRENT;
+ struct gdrom_control *ctrl;
+ struct buffer_head *bh = req->bh;
+
+ if (QUEUE_EMPTY || req->rq_status == RQ_INACTIVE)
+ break;
+
+ if (req->cmd != READ) {
+ printk(KERN_ERR "GDROM: bad cmd %d\n", req->cmd);
+ end_request(0);
+ continue;
+ }
+
+ if (DEVICE_NR((req->rq_dev)) != 0) {
+ printk(KERN_ERR "GD-ROM: No such device.\n");
+ end_request(0);
+ continue;
+ }
+
+ while (req->nr_sectors) {
+ int nsecs = 0;
+
+ /* Umm... request may have been merged... */
+ while (bh) {
+ if (bh->b_data != req->buffer + (nsecs*512))
+ break;
+ nsecs += 4;
+ bh = bh->b_reqnext;
+ }
+
+ ctrl = &gdrom_control[DEVICE_NR(req->rq_dev)];
+ ret = gdrom_read_sectors(ctrl, req->buffer,
+ req->sector, nsecs);
+ if (ret != nsecs)
+ break;
+
+ req->sector += nsecs;
+ req->nr_sectors -= nsecs;
+ if (bh)
+ req->buffer = bh->b_data;
+ ret = 0;
+ }
+
+ if (ret != 0)
+ end_request(0);
+ else
+ end_request(1);
+ }
+}
+
+#define TOC_LBA(n) ((n)&0xffffff00)
+#define TOC_ADR(n) ((n)&0x0f)
+#define TOC_CTRL(n) (((n)&0xf0)>>4)
+#define TOC_TRACK(n) (((n)&0x0000ff00)>>8)
+
+static int gdrom_get_last_session(struct cdrom_device_info *cdi,
+ struct cdrom_multisession *ms_info)
+{
+ struct gdrom_control *ctrl;
+ int error, track;
+
+ if (DEVICE_NR(cdi->dev) != 0)
+ return -ENODEV;
+ ctrl = &gdrom_control[DEVICE_NR(cdi->dev)];
+ error = gdrom_read_toc(ctrl);
+ if (error)
+ return error;
+
+ for (track = TOC_TRACK(ctrl->toc.last);
+ track >= TOC_TRACK(ctrl->toc.first);
+ --track)
+ if (TOC_CTRL(ctrl->toc.entry[track-1]))
+ break;
+
+ if (track < TOC_TRACK(ctrl->toc.first) || track > 100)
+ return -ENXIO;
+
+ ms_info->addr_format = CDROM_LBA;
+ ms_info->addr.lba = htonl(TOC_LBA(ctrl->toc.entry[track-1])) -
+ GDROM_SESSION_OFFSET;
+ ms_info->xa_flag = 1;
+
+ return 0;
+}
+
+static int gdrom_open(struct cdrom_device_info *cdi, int purpose)
+{
+ struct gdrom_control *ctrl;
+ int i;
+ int error = 0;
+
+ if (DEVICE_NR(cdi->dev) != 0)
+ return -ENODEV;
+ ctrl = &gdrom_control[DEVICE_NR(cdi->dev)];
+
+ for (i = 0; i < 5; i++)
+ if ((error = gdrom_mount_disk(ctrl)) == 0)
+ break;
+ if (error)
+ return error;
+
+ MOD_INC_USE_COUNT;
+ ctrl->users++;
+ return 0;
+}
+
+static void gdrom_release(struct cdrom_device_info * cdi)
+{
+ struct gdrom_control *ctrl;
+
+ if (DEVICE_NR(cdi->dev) != 0)
+ return;
+ ctrl = &gdrom_control[DEVICE_NR(cdi->dev)];
+ ctrl->users--;
+ MOD_DEC_USE_COUNT;
+}
+
+static struct cdrom_device_ops gdrom_dops = {
+ open: gdrom_open,
+ release: gdrom_release,
+ get_last_session: gdrom_get_last_session,
+ capability: CDC_MULTI_SESSION,
+};
+
+static struct cdrom_device_info gdrom_info = {
+ ops: &gdrom_dops,
+ speed: 2,
+ capacity: 1,
+ name: "gdrom",
+};
+
+/*
+ * This driver works with new merge interface, but if the merge occurs
+ * performance gets really worse. Hence, we disable the merge of requests.
+ */
+static int dont_merge_requests_fn(request_queue_t *q, struct request *req,
+ struct request *next, int max_segments)
+{
+ return 0;
+}
+
+static int dont_bh_merge_fn(request_queue_t *q, struct request *req,
+ struct buffer_head *bh, int max_segments)
+{
+ return 0;
+}
+
+static int __init gdrom_init(void)
+{
+ request_queue_t * q;
+
+ if (request_irq(GDROM_IRQ, gdrom_intr, SA_INTERRUPT,
+ DEVICE_STR, gdrom_control)) {
+ printk(KERN_ERR "Unable to get IRQ%d for GD-ROM\n", GDROM_IRQ);
+ return -EBUSY;
+ }
+
+ if (devfs_register_blkdev(MAJOR_NR, DEVICE_STR, &gdrom_bdops) != 0) {
+ printk(KERN_ERR "GDROM: Unable to get major %d for GD-ROM\n", MAJOR_NR);
+ free_irq(GDROM_IRQ, NULL);
+ return -EIO;
+ }
+
+ q = BLK_DEFAULT_QUEUE(MAJOR_NR);
+ blk_init_queue(q, DEVICE_REQUEST);
+ q->back_merge_fn = dont_bh_merge_fn;
+ q->front_merge_fn = dont_bh_merge_fn;
+ q->merge_requests_fn = dont_merge_requests_fn;
+ blksize_size[MAJOR_NR] = &gdrom_blocksize;
+ hardsect_size[MAJOR_NR] = &gdrom_hardsecsize;
+ read_ahead[MAJOR_NR] = 4;
+
+ gdrom_info.dev = MKDEV(MAJOR_NR,0);
+ if (register_cdrom(&gdrom_info) != 0) {
+ printk(KERN_ERR "Cannot register SEGA GD-ROM!\n");
+ free_irq(GDROM_IRQ, NULL);
+ if (devfs_unregister_blkdev(MAJOR_NR, DEVICE_STR) != 0)
+ printk(KERN_ERR "unregister_blkdev() failed\n");
+ blk_cleanup_queue(BLK_DEFAULT_QUEUE(MAJOR_NR));
+ return -EIO;
+ }
+
+ gdrom_start();
+
+ printk(KERN_INFO "SEGA Dreamcast GD-ROM driver\n");
+ return 0;
+}
+
+static void __exit gdrom_exit(void)
+{
+ if (unregister_cdrom(&gdrom_info))
+ printk(KERN_ERR "Can't unregister GD-ROM driver\n");
+ if ((devfs_unregister_blkdev(MAJOR_NR, DEVICE_STR ) == -EINVAL))
+ printk(KERN_ERR "Can't unregister GD-ROM\n" );
+ free_irq(GDROM_IRQ, NULL);
+ blk_cleanup_queue(BLK_DEFAULT_QUEUE(MAJOR_NR));
+}
+
+module_init(gdrom_init);
+module_exit(gdrom_exit);
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/drivers/char/Makefile /usr/src/sh/7751/cvs/linux/drivers/char/Makefile
--- /usr/src/sh/7751/cvs/linux-2.4.18/drivers/char/Makefile Mon Feb 25 21:37:57 2002
+++ /usr/src/sh/7751/cvs/linux/drivers/char/Makefile Tue Feb 26 13:42:29 2002
@@ -95,7 +95,7 @@
endif
ifeq ($(CONFIG_SH_DREAMCAST),y)
KEYMAP = defkeymap.o
- KEYBD =
+ KEYBD = dc_keyb.o
CONSOLE = console.o
endif
endif
@@ -176,6 +176,9 @@
obj-y += joystick/js.o
endif
+obj-$(CONFIG_MAPLE_KEYBOARD) += maple_keyb.o
+obj-$(CONFIG_MAPLE_MOUSE) += maplemouse.o
+
obj-$(CONFIG_BUSMOUSE) += busmouse.o
obj-$(CONFIG_DTLK) += dtlk.o
obj-$(CONFIG_R3964) += n_r3964.o
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/drivers/char/dc_keyb.c /usr/src/sh/7751/cvs/linux/drivers/char/dc_keyb.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/drivers/char/dc_keyb.c Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/drivers/char/dc_keyb.c Mon Oct 15 22:44:57 2001
@@ -0,0 +1,276 @@
+/*
+ * $Id: dc_keyb.c,v 1.1.1.1 2001/10/15 20:44:57 mrbrown Exp $
+ * linux/drivers/char/dc_keyb.c
+ * taken from linux/drivers/char/pc_keyb.c
+ */
+
+/*
+ * linux/drivers/char/pc_keyb.c
+ *
+ * Separation of the PC low-level part by Geert Uytterhoeven, May 1997
+ * See keyboard.c for the whole history.
+ *
+ * Major cleanup by Martin Mares, May 1997
+ *
+ * Combined the keyboard and PS/2 mouse handling into one file,
+ * because they share the same hardware.
+ * Johan Myreen 1998-10-08.
+ *
+ * Code fixes to handle mouse ACKs properly.
+ * C. Scott Ananian 1999-01-29.
+ *
+ */
+
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+/* Some configuration switches are present in the include file... */
+
+#include
+
+/* Simple translation table for the SysRq keys */
+
+#ifdef CONFIG_MAGIC_SYSRQ
+unsigned char pckbd_sysrq_xlate[128] =
+ "\000\0331234567890-=\177\t" /* 0x00 - 0x0f */
+ "qwertyuiop[]\r\000as" /* 0x10 - 0x1f */
+ "dfghjkl;'`\000\\zxcv" /* 0x20 - 0x2f */
+ "bnm,./\000*\000 \000\201\202\203\204\205" /* 0x30 - 0x3f */
+ "\206\207\210\211\212\000\000789-456+1" /* 0x40 - 0x4f */
+ "230\177\000\000\213\214\000\000\000\000\000\000\000\000\000\000" /* 0x50 - 0x5f */
+ "\r\000/"; /* 0x60 - 0x6f */
+#endif
+
+/*
+ * Translation of escaped scancodes to keycodes.
+ * This is now user-settable.
+ * The keycodes 1-88,96-111,119 are fairly standard, and
+ * should probably not be changed - changing might confuse X.
+ * X also interprets scancode 0x5d (KEY_Begin).
+ *
+ * For 1-88 keycode equals scancode.
+ */
+
+#define E0_KPENTER 96
+#define E0_RCTRL 97
+#define E0_KPSLASH 98
+#define E0_PRSCR 99
+#define E0_RALT 100
+#define E0_BREAK 101 /* (control-pause) */
+#define E0_HOME 102
+#define E0_UP 103
+#define E0_PGUP 104
+#define E0_LEFT 105
+#define E0_RIGHT 106
+#define E0_END 107
+#define E0_DOWN 108
+#define E0_PGDN 109
+#define E0_INS 110
+#define E0_DEL 111
+
+#define E1_PAUSE 119
+
+/*
+ * The keycodes below are randomly located in 89-95,112-118,120-127.
+ * They could be thrown away (and all occurrences below replaced by 0),
+ * but that would force many users to use the `setkeycodes' utility, where
+ * they needed not before. It does not matter that there are duplicates, as
+ * long as no duplication occurs for any single keyboard.
+ */
+#define SC_LIM 89
+
+#define FOCUS_PF1 85 /* actual code! */
+#define FOCUS_PF2 89
+#define FOCUS_PF3 90
+#define FOCUS_PF4 91
+#define FOCUS_PF5 92
+#define FOCUS_PF6 93
+#define FOCUS_PF7 94
+#define FOCUS_PF8 95
+#define FOCUS_PF9 120
+#define FOCUS_PF10 121
+#define FOCUS_PF11 122
+#define FOCUS_PF12 123
+
+#define JAP_86 124
+/* tfj@olivia.ping.dk:
+ * The four keys are located over the numeric keypad, and are
+ * labelled A1-A4. It's an rc930 keyboard, from
+ * Regnecentralen/RC International, Now ICL.
+ * Scancodes: 59, 5a, 5b, 5c.
+ */
+#define RGN1 124
+#define RGN2 125
+#define RGN3 126
+#define RGN4 127
+
+static unsigned char high_keys[128 - SC_LIM] = {
+ RGN1, RGN2, RGN3, RGN4, 0, 0, 0, /* 0x59-0x5f */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* 0x60-0x67 */
+ 0, 0, 0, 0, 0, FOCUS_PF11, 0, FOCUS_PF12, /* 0x68-0x6f */
+ 0, 0, 0, FOCUS_PF2, FOCUS_PF9, 0, 0, FOCUS_PF3, /* 0x70-0x77 */
+ FOCUS_PF4, FOCUS_PF5, FOCUS_PF6, FOCUS_PF7, /* 0x78-0x7b */
+ FOCUS_PF8, JAP_86, FOCUS_PF10, 0 /* 0x7c-0x7f */
+};
+
+/* BTC */
+#define E0_MACRO 112
+/* LK450 */
+#define E0_F13 113
+#define E0_F14 114
+#define E0_HELP 115
+#define E0_DO 116
+#define E0_F17 117
+#define E0_KPMINPLUS 118
+/*
+ * My OmniKey generates e0 4c for the "OMNI" key and the
+ * right alt key does nada. [kkoller@nyx10.cs.du.edu]
+ */
+#define E0_OK 124
+/*
+ * New microsoft keyboard is rumoured to have
+ * e0 5b (left window button), e0 5c (right window button),
+ * e0 5d (menu button). [or: LBANNER, RBANNER, RMENU]
+ * [or: Windows_L, Windows_R, TaskMan]
+ */
+#define E0_MSLW 125
+#define E0_MSRW 126
+#define E0_MSTM 127
+
+static unsigned char e0_keys[128] = {
+ 0, 0, 0, 0, 0, 0, 0, 0, /* 0x00-0x07 */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* 0x08-0x0f */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* 0x10-0x17 */
+ 0, 0, 0, 0, E0_KPENTER, E0_RCTRL, 0, 0, /* 0x18-0x1f */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* 0x20-0x27 */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* 0x28-0x2f */
+ 0, 0, 0, 0, 0, E0_KPSLASH, 0, E0_PRSCR, /* 0x30-0x37 */
+ E0_RALT, 0, 0, 0, 0, E0_F13, E0_F14, E0_HELP, /* 0x38-0x3f */
+ E0_DO, E0_F17, 0, 0, 0, 0, E0_BREAK, E0_HOME, /* 0x40-0x47 */
+ E0_UP, E0_PGUP, 0, E0_LEFT, E0_OK, E0_RIGHT, E0_KPMINPLUS, E0_END,/* 0x48-0x4f */
+ E0_DOWN, E0_PGDN, E0_INS, E0_DEL, 0, 0, 0, 0, /* 0x50-0x57 */
+ 0, 0, 0, E0_MSLW, E0_MSRW, E0_MSTM, 0, 0, /* 0x58-0x5f */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* 0x60-0x67 */
+ 0, 0, 0, 0, 0, 0, 0, E0_MACRO, /* 0x68-0x6f */
+ 0, 0, 0, 0, 0, 0, 0, 0, /* 0x70-0x77 */
+ 0, 0, 0, 0, 0, 0, 0, 0 /* 0x78-0x7f */
+};
+
+int kbd_translate(unsigned char scancode, unsigned char *keycode,
+ char raw_mode)
+{
+ static int prev_scancode;
+
+ /* special prefix scancodes.. */
+ if (scancode == 0xe0 || scancode == 0xe1) {
+ prev_scancode = scancode;
+ return 0;
+ }
+
+ /* 0xFF is sent by a few keyboards, ignore it. 0x00 is error */
+ if (scancode == 0x00 || scancode == 0xff) {
+ prev_scancode = 0;
+ return 0;
+ }
+
+ scancode &= 0x7f;
+
+ if (prev_scancode) {
+ /*
+ * usually it will be 0xe0, but a Pause key generates
+ * e1 1d 45 e1 9d c5 when pressed, and nothing when released
+ */
+ if (prev_scancode != 0xe0) {
+ if (prev_scancode == 0xe1 && scancode == 0x1d) {
+ prev_scancode = 0x100;
+ return 0;
+ } else if (prev_scancode == 0x100 && scancode == 0x45) {
+ *keycode = E1_PAUSE;
+ prev_scancode = 0;
+ } else {
+#ifdef KBD_REPORT_UNKN
+ if (!raw_mode)
+ printk(KERN_INFO "keyboard: unknown e1 escape sequence\n");
+#endif
+ prev_scancode = 0;
+ return 0;
+ }
+ } else {
+ prev_scancode = 0;
+ /*
+ * The keyboard maintains its own internal caps lock and
+ * num lock statuses. In caps lock mode E0 AA precedes make
+ * code and E0 2A follows break code. In num lock mode,
+ * E0 2A precedes make code and E0 AA follows break code.
+ * We do our own book-keeping, so we will just ignore these.
+ */
+ /*
+ * For my keyboard there is no caps lock mode, but there are
+ * both Shift-L and Shift-R modes. The former mode generates
+ * E0 2A / E0 AA pairs, the latter E0 B6 / E0 36 pairs.
+ * So, we should also ignore the latter. - aeb@cwi.nl
+ */
+ if (scancode == 0x2a || scancode == 0x36)
+ return 0;
+
+ if (e0_keys[scancode])
+ *keycode = e0_keys[scancode];
+ else {
+#ifdef KBD_REPORT_UNKN
+ if (!raw_mode)
+ printk(KERN_INFO "keyboard: unknown scancode e0 %02x\n",
+ scancode);
+#endif
+ return 0;
+ }
+ }
+ } else if (scancode >= SC_LIM) {
+ /* This happens with the FOCUS 9000 keyboard
+ Its keys PF1..PF12 are reported to generate
+ 55 73 77 78 79 7a 7b 7c 74 7e 6d 6f
+ Moreover, unless repeated, they do not generate
+ key-down events, so we have to zero up_flag below */
+ /* Also, Japanese 86/106 keyboards are reported to
+ generate 0x73 and 0x7d for \ - and \ | respectively. */
+ /* Also, some Brazilian keyboard is reported to produce
+ 0x73 and 0x7e for \ ? and KP-dot, respectively. */
+
+ *keycode = high_keys[scancode - SC_LIM];
+
+ if (!*keycode) {
+ if (!raw_mode) {
+#ifdef KBD_REPORT_UNKN
+ printk(KERN_INFO "keyboard: unrecognized scancode (%02x)"
+ " - ignored\n", scancode);
+#endif
+ }
+ return 0;
+ }
+ } else
+ *keycode = scancode;
+ return 1;
+}
+
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/drivers/char/hp600_keyb.c /usr/src/sh/7751/cvs/linux/drivers/char/hp600_keyb.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/drivers/char/hp600_keyb.c Fri Sep 14 01:21:32 2001
+++ /usr/src/sh/7751/cvs/linux/drivers/char/hp600_keyb.c Mon Oct 15 22:44:57 2001
@@ -1,5 +1,5 @@
/*
- * $Id$
+ * $Id: hp600_keyb.c,v 1.1.1.1 2001/10/15 20:44:57 mrbrown Exp $
* Copyright (C) 2000 YAEGASHI Takeshi
* HP600 keyboard scan routine and translation table
* Copyright (C) 2000 Niibe Yutaka
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/drivers/char/joystick/Config.in /usr/src/sh/7751/cvs/linux/drivers/char/joystick/Config.in
--- /usr/src/sh/7751/cvs/linux-2.4.18/drivers/char/joystick/Config.in Thu Sep 13 01:34:06 2001
+++ /usr/src/sh/7751/cvs/linux/drivers/char/joystick/Config.in Mon Oct 15 22:44:59 2001
@@ -46,6 +46,11 @@
if [ "$CONFIG_AMIGA" = "y" ]; then
dep_tristate ' Amiga joysticks' CONFIG_INPUT_AMIJOY $CONFIG_INPUT
fi
+
+ if [ "$CONFIG_MAPLE" != "n" ]; then
+ comment 'Dreamcast Maple Bus controllers'
+ dep_tristate ' Maple Bus controllers' CONFIG_INPUT_MAPLE_CONTROL $CONFIG_INPUT
+ fi
else
comment 'Input core support is needed for joysticks'
fi
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/drivers/char/joystick/Makefile /usr/src/sh/7751/cvs/linux/drivers/char/joystick/Makefile
--- /usr/src/sh/7751/cvs/linux-2.4.18/drivers/char/joystick/Makefile Thu Sep 13 01:34:06 2001
+++ /usr/src/sh/7751/cvs/linux/drivers/char/joystick/Makefile Mon Oct 15 22:44:59 2001
@@ -65,6 +65,8 @@
obj-$(CONFIG_INPUT_AMIJOY) += amijoy.o
+obj-$(CONFIG_INPUT_MAPLE_CONTROL)+= maplecontrol.o
+
# The global Rules.make.
include $(TOPDIR)/Rules.make
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/drivers/char/joystick/maplecontrol.c /usr/src/sh/7751/cvs/linux/drivers/char/joystick/maplecontrol.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/drivers/char/joystick/maplecontrol.c Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/drivers/char/joystick/maplecontrol.c Mon Oct 15 22:44:59 2001
@@ -0,0 +1,191 @@
+/*
+ * $Id: maplecontrol.c,v 1.1.1.1 2001/10/15 20:44:59 mrbrown Exp $
+ * SEGA Dreamcast controller driver
+ * Based on drivers/usb/iforce.c
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+MODULE_AUTHOR("YAEGASHI Takeshi ");
+MODULE_DESCRIPTION("SEGA Dreamcast controller driver");
+
+struct dc_pad {
+ struct input_dev dev;
+ int open;
+};
+
+
+static void dc_pad_callback(struct mapleq *mq)
+{
+ unsigned short buttons;
+ struct maple_device *mapledev = mq->dev;
+ struct dc_pad *pad = mapledev->private_data;
+ struct input_dev *dev = &pad->dev;
+ unsigned char *res = mq->recvbuf;
+
+ buttons = ~*(unsigned short *)(res+8);
+
+ input_report_abs(dev, ABS_HAT0Y,
+ (buttons&0x0010?-1:0)+(buttons&0x0020?+1:0));
+ input_report_abs(dev, ABS_HAT0X,
+ (buttons&0x0040?-1:0)+(buttons&0x0080?+1:0));
+ input_report_abs(dev, ABS_HAT1Y,
+ (buttons&0x1000?-1:0)+(buttons&0x2000?+1:0));
+ input_report_abs(dev, ABS_HAT1X,
+ (buttons&0x4000?-1:0)+(buttons&0x8000?+1:0));
+
+ input_report_key(dev, BTN_C, buttons&0x0001);
+ input_report_key(dev, BTN_B, buttons&0x0002);
+ input_report_key(dev, BTN_A, buttons&0x0004);
+ input_report_key(dev, BTN_START, buttons&0x0008);
+ input_report_key(dev, BTN_Z, buttons&0x0100);
+ input_report_key(dev, BTN_Y, buttons&0x0200);
+ input_report_key(dev, BTN_X, buttons&0x0400);
+ input_report_key(dev, BTN_SELECT, buttons&0x0800);
+
+ input_report_abs(dev, ABS_GAS, res[10]);
+ input_report_abs(dev, ABS_BRAKE, res[11]);
+ input_report_abs(dev, ABS_X, res[12]);
+ input_report_abs(dev, ABS_Y, res[13]);
+ input_report_abs(dev, ABS_RX, res[14]);
+ input_report_abs(dev, ABS_RY, res[15]);
+}
+
+
+static int dc_pad_open(struct input_dev *dev)
+{
+ struct dc_pad *pad = dev->private;
+ pad->open++;
+ return 0;
+}
+
+
+static void dc_pad_close(struct input_dev *dev)
+{
+ struct dc_pad *pad = dev->private;
+ pad->open--;
+}
+
+
+static int dc_pad_connect(struct maple_device *dev)
+{
+ int i;
+ unsigned long data = be32_to_cpu(dev->devinfo.function_data[0]);
+ struct dc_pad *pad;
+
+ const short btn_bit[32] = {
+ BTN_C, BTN_B, BTN_A, BTN_START, -1, -1, -1, -1,
+ BTN_Z, BTN_Y, BTN_X, BTN_SELECT, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ };
+
+ const short abs_bit[32] = {
+ -1, -1, -1, -1, ABS_HAT0Y, ABS_HAT0Y, ABS_HAT0X, ABS_HAT0X,
+ -1, -1, -1, -1, ABS_HAT1Y, ABS_HAT1Y, ABS_HAT1X, ABS_HAT1X,
+ ABS_GAS, ABS_BRAKE, ABS_X, ABS_Y, ABS_RX, ABS_RY, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ };
+
+ if (!(pad = kmalloc(sizeof(struct dc_pad), GFP_KERNEL)))
+ return -1;
+ memset(pad, 0, sizeof(struct dc_pad));
+
+ dev->private_data = pad;
+
+ for (i=0; i<32; i++)
+ if (data&(1<=0)
+ pad->dev.keybit[LONG(BTN_JOYSTICK)] |= BIT(btn_bit[i]);
+
+ if (pad->dev.keybit[LONG(BTN_JOYSTICK)])
+ pad->dev.evbit[0] |= BIT(EV_KEY);
+
+ for (i=0; i<32; i++)
+ if (data&(1<=0)
+ pad->dev.absbit[0] |= BIT(abs_bit[i]);
+
+ if (pad->dev.absbit[0])
+ pad->dev.evbit[0] |= BIT(EV_ABS);
+
+ for (i=ABS_X; i<=ABS_BRAKE; i++) {
+ pad->dev.absmax[i] = 255;
+ pad->dev.absmin[i] = 0;
+ pad->dev.absfuzz[i] = 0;
+ pad->dev.absflat[i] = 0;
+ }
+
+ for (i=ABS_HAT0X; i<=ABS_HAT3Y; i++) {
+ pad->dev.absmax[i] = 1;
+ pad->dev.absmin[i] = -1;
+ pad->dev.absfuzz[i] = 0;
+ pad->dev.absflat[i] = 0;
+ }
+
+ pad->dev.private = pad;
+ pad->dev.open = dc_pad_open;
+ pad->dev.close = dc_pad_close;
+ pad->dev.event = NULL;
+
+ pad->dev.name = dev->product_name;
+ pad->dev.idbus = BUS_MAPLE;
+
+ input_register_device(&pad->dev);
+
+ maple_getcond_callback(dev, dc_pad_callback, 1, MAPLE_FUNC_CONTROLLER);
+
+ printk(KERN_INFO "input%d: controller(0x%lx): %s\n",
+ pad->dev.number, data, pad->dev.name);
+
+ MOD_INC_USE_COUNT;
+
+ return 0;
+}
+
+
+static void dc_pad_disconnect(struct maple_device *dev)
+{
+ struct dc_pad *pad = dev->private_data;
+
+ input_unregister_device(&pad->dev);
+
+ kfree(pad);
+
+ MOD_DEC_USE_COUNT;
+}
+
+
+static struct maple_driver dc_pad_driver = {
+ function: MAPLE_FUNC_CONTROLLER,
+ name: "Dreamcast controller",
+ connect: dc_pad_connect,
+ disconnect: dc_pad_disconnect,
+};
+
+
+static int __init dc_pad_init(void)
+{
+ maple_register_driver(&dc_pad_driver);
+ return 0;
+}
+
+
+static void __exit dc_pad_exit(void)
+{
+ maple_unregister_driver(&dc_pad_driver);
+}
+
+
+module_init(dc_pad_init);
+module_exit(dc_pad_exit);
+
+/*
+ * Local variables:
+ * c-basic-offset: 8
+ * End:
+ */
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/drivers/char/maple_keyb.c /usr/src/sh/7751/cvs/linux/drivers/char/maple_keyb.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/drivers/char/maple_keyb.c Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/drivers/char/maple_keyb.c Thu Dec 6 17:23:03 2001
@@ -0,0 +1,190 @@
+/*
+ * $Id: maple_keyb.c,v 1.1.1.1.2.1 2001/12/06 15:23:03 mrbrown Exp $
+ * SEGA Dreamcast keyboard driver
+ * Based on drivers/usb/usbkbd.c
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+MODULE_AUTHOR("YAEGASHI Takeshi ");
+MODULE_DESCRIPTION("SEGA Dreamcast keyboard driver");
+
+static unsigned char dc_kbd_keycode[256] = {
+ 0, 0, 0, 0, 30, 48, 46, 32, 18, 33, 34, 35, 23, 36, 37, 38,
+ 50, 49, 24, 25, 16, 19, 31, 20, 22, 47, 17, 45, 21, 44, 2, 3,
+ 4, 5, 6, 7, 8, 9, 10, 11, 28, 1, 14, 15, 57, 12, 13, 26,
+ 27, 43, 84, 39, 40, 41, 51, 52, 53, 58, 59, 60, 61, 62, 63, 64,
+ 65, 66, 67, 68, 87, 88, 99, 70,119,110,102,104,111,107,109,106,
+ 105,108,103, 69, 98, 55, 74, 78, 96, 79, 80, 81, 75, 76, 77, 71,
+ 72, 73, 82, 83, 86,127,116,117, 85, 89, 90, 91, 92, 93, 94, 95,
+ 120,121,122,123,134,138,130,132,128,129,131,137,133,135,136,113,
+ 115,114, 0, 0, 0,124, 0,181,182,183,184,185,186,187,188,189,
+ 190,191,192,193,194,195,196,197,198, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 29, 42, 56,125, 97, 54,100,126,164,166,165,163,161,115,114,113,
+ 150,158,159,128,136,177,178,176,142,152,173,140
+};
+
+
+struct dc_kbd {
+ struct input_dev dev;
+ unsigned char new[8];
+ unsigned char old[8];
+ int open;
+};
+
+
+static void dc_scan_kbd(struct dc_kbd *kbd)
+{
+ int i;
+ struct input_dev *dev = &kbd->dev;
+
+ for(i=0; i<8; i++)
+ input_report_key(dev,
+ dc_kbd_keycode[i+224],
+ (kbd->new[0]>>i)&1);
+
+ for(i=2; i<8; i++) {
+
+ if(kbd->old[i]>3&&memchr(kbd->new+2, kbd->old[i], 6)==NULL) {
+ if(dc_kbd_keycode[kbd->old[i]])
+ input_report_key(dev,
+ dc_kbd_keycode[kbd->old[i]],
+ 0);
+ else
+ printk("Unknown key (scancode %#x) released.",
+ kbd->old[i]);
+ }
+
+ if(kbd->new[i]>3&&memchr(kbd->old+2, kbd->new[i], 6)!=NULL) {
+ if(dc_kbd_keycode[kbd->new[i]])
+ input_report_key(dev,
+ dc_kbd_keycode[kbd->new[i]],
+ 1);
+ else
+ printk("Unknown key (scancode %#x) pressed.",
+ kbd->new[i]);
+ }
+ }
+
+ memcpy(kbd->old, kbd->new, 8);
+}
+
+
+static void dc_kbd_callback(struct mapleq *mq)
+{
+ struct maple_device *mapledev = mq->dev;
+ struct dc_kbd *kbd = mapledev->private_data;
+ unsigned long *buf = mq->recvbuf;
+
+ if (buf[1] == mapledev->function) {
+ memcpy(kbd->new, buf+2, 8);
+ dc_scan_kbd(kbd);
+ }
+}
+
+
+static int dc_kbd_open(struct input_dev *dev)
+{
+ struct dc_kbd *kbd = dev->private;
+ kbd->open++;
+ return 0;
+}
+
+
+static void dc_kbd_close(struct input_dev *dev)
+{
+ struct dc_kbd *kbd = dev->private;
+ kbd->open--;
+}
+
+
+static int dc_kbd_connect(struct maple_device *dev)
+{
+ int i;
+ unsigned long data = be32_to_cpu(dev->devinfo.function_data[0]);
+ struct dc_kbd *kbd;
+
+ if (!(kbd = kmalloc(sizeof(struct dc_kbd), GFP_KERNEL)))
+ return -1;
+ memset(kbd, 0, sizeof(struct dc_kbd));
+
+ dev->private_data = kbd;
+
+ kbd->dev.evbit[0] = BIT(EV_KEY) | BIT(EV_REP);
+
+ for (i=0; i<255; i++)
+ set_bit(dc_kbd_keycode[i], kbd->dev.keybit);
+ clear_bit(0, kbd->dev.keybit);
+
+ kbd->dev.private = kbd;
+ kbd->dev.open = dc_kbd_open;
+ kbd->dev.close = dc_kbd_close;
+ kbd->dev.event = NULL;
+
+ kbd->dev.name = dev->product_name;
+ kbd->dev.idbus = BUS_MAPLE;
+
+ input_register_device(&kbd->dev);
+
+ maple_getcond_callback(dev, dc_kbd_callback, 1, MAPLE_FUNC_KEYBOARD);
+
+ printk(KERN_INFO "input%d: keyboard(0x%lx): %s\n",
+ kbd->dev.number, data, kbd->dev.name);
+
+ MOD_INC_USE_COUNT;
+
+ return 0;
+}
+
+
+static void dc_kbd_disconnect(struct maple_device *dev)
+{
+ struct dc_kbd *kbd = dev->private_data;
+
+ input_unregister_device(&kbd->dev);
+
+ kfree(kbd);
+
+ MOD_DEC_USE_COUNT;
+}
+
+
+static struct maple_driver dc_kbd_driver = {
+ function: MAPLE_FUNC_KEYBOARD,
+ name: "Dreamcast keyboard",
+ connect: dc_kbd_connect,
+ disconnect: dc_kbd_disconnect,
+};
+
+
+static int __init dc_kbd_init(void)
+{
+ maple_register_driver(&dc_kbd_driver);
+ return 0;
+}
+
+
+static void __exit dc_kbd_exit(void)
+{
+ maple_unregister_driver(&dc_kbd_driver);
+}
+
+
+module_init(dc_kbd_init);
+module_exit(dc_kbd_exit);
+
+/*
+ * Local variables:
+ * c-basic-offset: 8
+ * End:
+ */
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/drivers/char/maplemouse.c /usr/src/sh/7751/cvs/linux/drivers/char/maplemouse.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/drivers/char/maplemouse.c Thu Jan 1 02:00:00 1970
+++ /usr/src/sh/7751/cvs/linux/drivers/char/maplemouse.c Mon Oct 15 22:44:57 2001
@@ -0,0 +1,137 @@
+/*
+ * $Id: maplemouse.c,v 1.1.1.1 2001/10/15 20:44:57 mrbrown Exp $
+ * SEGA Dreamcast mouse driver
+ * Based on drivers/usb/usbmouse.c
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+MODULE_AUTHOR("YAEGASHI Takeshi ");
+MODULE_DESCRIPTION("SEGA Dreamcast mouse driver");
+
+struct dc_mouse {
+ struct input_dev dev;
+ int open;
+};
+
+
+static void dc_mouse_callback(struct mapleq *mq)
+{
+ int buttons, relx, rely, relz;
+ struct maple_device *mapledev = mq->dev;
+ struct dc_mouse *mouse = mapledev->private_data;
+ struct input_dev *dev = &mouse->dev;
+ unsigned char *res = mq->recvbuf;
+
+ buttons = ~res[8];
+ relx=*(unsigned short *)(res+12)-512;
+ rely=*(unsigned short *)(res+14)-512;
+ relz=*(unsigned short *)(res+16)-512;
+
+ input_report_key(dev, BTN_LEFT, buttons&4);
+ input_report_key(dev, BTN_MIDDLE, buttons&9);
+ input_report_key(dev, BTN_RIGHT, buttons&2);
+ input_report_rel(dev, REL_X, relx);
+ input_report_rel(dev, REL_Y, rely);
+ input_report_rel(dev, REL_WHEEL, relz);
+}
+
+
+static int dc_mouse_open(struct input_dev *dev)
+{
+ struct dc_mouse *mouse = dev->private;
+ mouse->open++;
+ return 0;
+}
+
+
+static void dc_mouse_close(struct input_dev *dev)
+{
+ struct dc_mouse *mouse = dev->private;
+ mouse->open--;
+}
+
+
+static int dc_mouse_connect(struct maple_device *dev)
+{
+ unsigned long data = be32_to_cpu(dev->devinfo.function_data[0]);
+ struct dc_mouse *mouse;
+
+ if (!(mouse = kmalloc(sizeof(struct dc_mouse), GFP_KERNEL)))
+ return -1;
+ memset(mouse, 0, sizeof(struct dc_mouse));
+
+ dev->private_data = mouse;
+
+ mouse->dev.evbit[0] = BIT(EV_KEY) | BIT(EV_REL);
+ mouse->dev.keybit[LONG(BTN_MOUSE)] = BIT(BTN_LEFT) | BIT(BTN_RIGHT) | BIT(BTN_MIDDLE);
+ mouse->dev.relbit[0] = BIT(REL_X) | BIT(REL_Y) | BIT(REL_WHEEL);
+
+ mouse->dev.private = mouse;
+ mouse->dev.open = dc_mouse_open;
+ mouse->dev.close = dc_mouse_close;
+ mouse->dev.event = NULL;
+
+ mouse->dev.name = dev->product_name;
+ mouse->dev.idbus = BUS_MAPLE;
+
+ input_register_device(&mouse->dev);
+
+ maple_getcond_callback(dev, dc_mouse_callback, 1, MAPLE_FUNC_MOUSE);
+
+ printk(KERN_INFO "input%d: mouse(0x%lx): %s\n",
+ mouse->dev.number, data, mouse->dev.name);
+
+ MOD_INC_USE_COUNT;
+
+ return 0;
+}
+
+
+static void dc_mouse_disconnect(struct maple_device *dev)
+{
+ struct dc_mouse *mouse = dev->private_data;
+
+ input_unregister_device(&mouse->dev);
+
+ kfree(mouse);
+
+ MOD_DEC_USE_COUNT;
+}
+
+
+static struct maple_driver dc_mouse_driver = {
+ function: MAPLE_FUNC_MOUSE,
+ name: "Dreamcast mouse",
+ connect: dc_mouse_connect,
+ disconnect: dc_mouse_disconnect,
+};
+
+
+static int __init dc_mouse_init(void)
+{
+ maple_register_driver(&dc_mouse_driver);
+ return 0;
+}
+
+
+static void __exit dc_mouse_exit(void)
+{
+ maple_unregister_driver(&dc_mouse_driver);
+}
+
+
+module_init(dc_mouse_init);
+module_exit(dc_mouse_exit);
+
+/*
+ * Local variables:
+ * c-basic-offset: 8
+ * End:
+ */
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/drivers/char/scan_keyb.c /usr/src/sh/7751/cvs/linux/drivers/char/scan_keyb.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/drivers/char/scan_keyb.c Thu Apr 12 07:24:52 2001
+++ /usr/src/sh/7751/cvs/linux/drivers/char/scan_keyb.c Mon Oct 15 22:44:58 2001
@@ -1,5 +1,5 @@
/*
- * $Id: scan_keyb.c,v 1.2 2000/07/04 06:24:42 yaegashi Exp $
+ * $Id: scan_keyb.c,v 1.1.1.1 2001/10/15 20:44:58 mrbrown Exp $
* Copyright (C) 2000 YAEGASHI Takeshi
* Generic scan keyboard driver
*/
diff -urN --exclude-from=diff.exc /usr/src/sh/7751/cvs/linux-2.4.18/drivers/char/sh-sci.c /usr/src/sh/7751/cvs/linux/drivers/char/sh-sci.c
--- /usr/src/sh/7751/cvs/linux-2.4.18/drivers/char/sh-sci.c Mon Feb 25 21:37:57 2002
+++ /usr/src/sh/7751/cvs/linux/drivers/char/sh-sci.c Wed Oct 16 09:22:44 2002
@@ -1,4 +1,4 @@
-/* $Id: sh-sci.c,v 1.40 2000/04/15 06:57:29 gniibe Exp $
+/* $Id: sh-sci.c,v 1.1.1.1.2.2 2002/05/10 17:58:55 jzs Exp $
*
* linux/drivers/char/sh-sci.c
*
@@ -32,7 +32,7 @@
#include
#include
#include