libera/#neo900/ Monday, 2018-10-29

Joerg-Neo900yes, "layout" is pole pos on todo. Together with "secure another 400 preorders and cases"00:09
Joerg-Neo900we had Houkime working on layout, but seems he's just MIA00:12
Joerg-Neo9005G definitely isn't s topic for modems etc for the next few years, it's way too new00:13
Joerg-Neo900not for nobodies like me ans Neo900 anyway00:29
croxhoukime is back :-)00:47
houkimeoh, sorry, i probably missed sth.00:47
croxhoukime, we were just wondering what the status of the layout work was00:48
houkimechecking irclog00:48
houkimethere is an RSS feed with git commits that atk made. Though I really MIA'd for several months on that00:51
houkimemotivation problems. Though recently I might have found extra reasons to continue so it may improve00:53
houkimeI remember stopped at display LED overvoltage/overcurrent control and stuff00:55
houkimeAnd i also remember that almost everything except this was basically done placement-wise00:56
houkimeAnd we were about to start a new cycle with timerotted part replacements and pcb house interactions to know routing limitations00:57
Joerg-Neo9005G comes - means some of the major carriers decide they need a new buzzword in their marketing.So for example Nokia tells TI "hey we need a SoC with 13 cores 77 gagahats each, except the praise-LE core which needs to be faster than 79, with a 7D Graphics Accel Get Astonished GAGA processor, and it needs 5 modems for WWAN integrated with at least one of them doing 5G worldwide coverage". Then 18 months later TI delivers first prototype samples00:59
Joerg-Neo900of the chip to Nokia, with a field engineer (or a dozen of them) who knows the nickname and birthday of each gate in that SoC by heart, so Nokia and that engineer can try create a somewhat working device with the SoC even though TI can't deliver any TRMs and UM aka "datasheets" for the chip yet.00:59
Joerg-Neo900long story truncated: until e.g. Neo900 could even start to ponder usingf that leete new chip, usually a 3 to 7 years will pass by after initial press release announcement of the chip01:01
Joerg-Neo900and 5G they don't even have the protocol specs settled and prettyprinted, so nobody within a sane mind would star developing a massmarket-targeted chip for it01:03
Joerg-Neo900start*01:03
Joerg-Neo900hi houkime01:03
houkimehi joerg. Long time no see. Checking irclog you had a bad time(01:05
Joerg-Neo900houkime: you should provide a "clean" layout placement draft so the product devs and circuit design engineers (werner, me) can review and catch the inferred 5 lacking special placement notes for a few sensors etc. Werner and me tried hard to add all that metainfo into the whitepapers and the schematics in "NOTE:"s, but probably we missed a few01:09
houkimeWhat exactly do you mean by "clean"?01:11
Joerg-Neo900I didn't look into any placement files yet, so maybe they are already existing and "clean" and I'm just not aware. Anyway either way we need a few hours "interactive" chat with you Werner me to make sure we're on same page with all that stuff01:11
Joerg-Neo900>>What exactly do you mean by "clean"?<< noting special, that's why I placed it in "ticks". Just needs to be appropriate document so werner and me can understand what you're doing regarding placement01:13
Joerg-Neo900afk01:13
houkimeok. I guess then it needs to be a documentation regarding reasoning behind placing components one way and not another.01:14
houkimeI thought about writing stuff this summer but never got to it evidently. My bad.01:15
houkimeThere're multiple .fods tables with placement calculations though they don't cover or explain everything.01:19
Joerg-Neo900hey, don't you think this is a tad over the top documetation wide? for pretty much 90+% of components, placment is trivial, for another 5% it's self evident03:00
Joerg-Neo900unless some placement consideration has impact to *all* at once, in which case whe should have had this chat much earlier. So let's hope this won't bite our rear03:01
Joerg-Neo900wise*03:02
houkimeright now there is placement itself (kicad pcb file) which is missing stuff on the upper (mainly because display connector esd protection was geometrically not feasible with parts that are in sch), fods calculations and issues in notabug repository that cover current and some past challenges and considerations.04:52

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